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150
2593O–AVR–02/12
ATmega644
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
15.11.3
TCNT2 – Timer/Counter Register
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a Compare Match between TCNT2 and the OCR2x Registers.
15.11.4
OCR2A – Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2A pin.
15.11.5
OCR2B – Output Compare Register B
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2B pin.
15.11.6
ASSR – Asynchronous Status Register
011
clkT2S/32 (From prescaler)
100
clkT2S/64 (From prescaler)
101
clkT2S/128 (From prescaler)
110
clk
T
2S/256 (From prescaler)
111
clkT2S/1024 (From prescaler)
Table 15-9.
Clock Select Bit Description
CS22
CS21
CS20
Description
Bit
76543210
TCNT2[7:0]
TCNT2
Read/Write
R/W
Initial Value
00000000
Bit
76543210
OCR2A[7:0]
OCR2A
Read/Write
R/W
Initial Value
00000000
Bit
76543210
OCR2B[7:0]
OCR2B
Read/Write
R/W
Initial Value
00000000
Bit
7
6
5
4
3
2
1
0
–
EXCLK
AS2
TCN2UB
OCR2AUB
OCR2BUB
TCR2AUB
TCR2BUB
ASSR
Read/Write
R
R/W
R
Initial Value
0