
126
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
Note:
1. A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is set.
See Bit 1:0 – WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
Table 15-5. Modes of operation supported by the Timer/Counter
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
01
WGMn3:0 = 8, 9 10 or 11: Toggle OCnA on Compare
Match, OCnB disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
10
Clear OCnA/OCnB on Compare Match when up-
counting. Set OCnA/OCnB on Compare Match when
downcounting.
11
Set OCnA/OCnB on Compare Match when up-
counting. Clear OCnA/OCnB on Compare Match
when downcounting.
Table 15-4.
Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
(1)
COMnA1/COMnB1
COMnA0/COMnB0
Description
Table 15-5.
Waveform Generation Mode Bit Descript
ionMode
WGMn3
WGMn2
(CTCn)
WGMn1
(PWMn1)
WGMn0
(PWMn0)
Timer/Counter Mode of
Operation
TOP
Update of
OCRn
x at
TOVn Flag
Set on
0
Normal
0xFFFF
Immediate
MAX
1
0
1
PWM, Phase Correct, 8-bit
0x00FF
TOP
BOTTOM
2
0
1
0
PWM, Phase Correct, 9-bit
0x01FF
TOP
BOTTOM
3
0
1
PWM, Phase Correct, 10-bit
0x03FF
TOP
BOTTOM
4
0
1
0
CTC
OCRnA
Immediate
MAX
5
0
1
0
1
Fast PWM, 8-bit
0x00FF
TOP
6
0
1
0
Fast PWM, 9-bit
0x01FF
TOP
7
0
1
Fast PWM, 10-bit
0x03FF
TOP
8
100
0
PWM, Phase and Frequency
Correct
ICRn
BOTTOM
9
100
1
PWM, Phase and Frequency
Correct
OCRnA
BOTTOM
10
1
0
1
0
PWM, Phase Correct
ICRn
TOP
BOTTOM
11
1
0
1
PWM, Phase Correct
OCRnA
TOP
BOTTOM
12
1
0
CTC
ICRn
Immediate
MAX
13
1
0
1
(Reserved)
–
14
1
0
Fast PWM
ICRn
TOP
15
1
Fast PWM
OCRnA
TOP