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ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
23.7.3
ADC Accuracy Definitions
An n-bit single-ended ADC converts a voltage linearly between GND and V
REF in 2
n steps (LSBs). The lowest code
is read as 0, and the highest code is read as 2
n-1.
Several parameters describe the deviation from the ideal behavior:
Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition (at 0.5 LSB). Ideal
value: 0 LSB
Figure 23-10. Offset error.
Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the last transition (0x3FE to
0x3FF) compared to the ideal transition (at 1.5 LSB below maximum). Ideal value: 0 LSB
Figure 23-11. Gain error.
Output Code
VREF Input Voltage
Ideal ADC
Actual ADC
Offset
Error
Output Code
VREF Input Voltage
Ideal ADC
Actual ADC
Gain
Error