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參數(shù)資料
| 型號(hào)： | MPC9850VF |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 250 MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA100 |
| 封裝： | PLASTIC, BGA-100 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 190K |
| 代理商： | MPC9850VF |
MPC9850
TIMING SOLUTIONS
7
MOTOROLA
Table 11. AC CHARACTERISTICS (VDD=3.3V±5%, VDDOA=VDDOB=3.3V±5%, TA=-40°Cto+85°C)ab
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
Input and output timing specification
fref
Input reference frequency (25 MHz input)
Input reference frequency (33 MHz input)
XTAL Input
Input reference frequency in PLL bypass modec
TBD
25
33
25
TBD
MHz
PLL bypass
fVCO
VCO frequency ranged
2000
MHz
fMCX
Output Frequency
Bank A output
Bank B output
Bank C output
TBD
MHz
PLL locked
frefPW
Reference Input Pulse Width
TBD
ps
frefCcc
Input Frequency Accuracy
100
ppm
tr,tf
Output Rise/Fall Time
TBD
ns
20% to 80%
DC
Output duty cycle
47.5
45
50
52.5
55
%
3.3V operation
2.5V operation
DCOSC
Reference Output for Crystal Input
TBD
50
TBD
%
PLL specifications
BW
PLL closed loop bandwidthe
TBD
kHz
tLOCK
Maximum PLL Lock Time
10
ms
treset_ref
MR hold time on power up
TBD
ns
treset_pulse
MR hold time
TBD
ns
Skew and jitter specifications
tsk(O)
Output-to-output Skew (within a bank)
50
ps
tsk(O)
Output-to-output Skew (across banks A and B)
100
ps
VDDOA =
VDDOB =3.3V
tJIT(CC)
Cycle-to-cycle jitter
RMS (1 σ)f
10
ps
tJIT(PER)
Period Jitter
RMS (1 σ)
TBD
ps
tJIT()
I/O Phase Jitter
RMS (1 σ)
TBD
ps
tr,tf
Output Rise/Fall Time
TBD
ns
20% to 80%
a. AC characteristics are design targets and pending characterization.
b. AC characteristics apply for parallel output termination of 50 to VTT.
c. In bypass mode, the MPC9850 divides the input reference clock.
d. The input reference frequency must match the VCO lock range divided by the total feedback divider ratio: fref =(fVCO ÷ M) N.
e. -3 dB point of PLL transfer characteristics.
f. See application note AN1934 for a jitter calculation for other confidence factors than 1 σ.
Figure 4. MPC9850 AC test reference (LVDS outputs)
Pulse
Generator
Z= 50
RT =50
ZO =50
DUT MPC9850
VTT
RT = 100
ZO =50
Figure 5. MPC9850 AC test reference (LVCMOS outputs)
Pulse
Generator
Z= 50
RT =50
ZO =50
DUT MPC9850
VTT
ZO =50
RT =50
VTT
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| MPC9855VMR2 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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