參數(shù)資料
型號: MPC9448AC
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 9448 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封裝: LEAD FREE, LQFP-32
文件頁數(shù): 10/12頁
文件大小: 486K
代理商: MPC9448AC
IDT / ICS LVCMOS 1:12 CLOCK FANOUT BUFFER
7
MPC9448
REV 6 JULY 11, 2006
MPC9448
3.3V/2.5V LVCMOS 1:12 CLOCK FANOUT BUFFER
Since this step is well above the threshold region, it will not
cause any false clock triggering; however, designers may be
uncomfortable with unwanted reflections on the line. To better
match the impedances when driving multiple lines, the
situation in Figure 6 should be used. In this case, the series
terminating resistors are reduced such that when the parallel
combination is added to the output buffer impedance, the line
impedance is perfectly matched.
Figure 6. Optimized Dual Line Termination
Power Consumption of the MPC9448 and
Thermal Management
The MPC9448 AC specification is guaranteed for the
entire operating frequency range up to 350 MHz. The
MPC9448 power consumption, and the associated long-term
reliability, may decrease the maximum frequency limit,
depending on operating conditions such as clock frequency,
supply voltage, output loading, ambient temperature, vertical
convection and thermal conductivity of package and board.
This section describes the impact of these parameters on the
junction temperature and gives a guideline to estimate the
MPC9448 die junction temperature and the associated
device reliability. For a complete analysis of power
consumption as a function of operating conditions and
associated long term device reliability, please refer to the
Freescale application note AN1545. According the AN1545,
the long-term device reliability is a function of the die junction
temperature:
Increased power consumption will increase the die
junction temperature and impact the device reliability
(MTBF). According to the system-defined tolerable MTBF,
the die junction temperature of the MPC9448 needs to be
controlled, and the thermal impedance of the board/package
should be optimized. The power dissipated in the MPC9448
is represented in equation 1.
Where ICCQ is the static current consumption of the
MPC9448, CPD is the power dissipation capacitance per
output.
(Μ)ΣCL represents the external capacitive output
load, and N is the number of active outputs (N is always 12 in
case of the MPC9448). The MPC9448 supports driving
transmission lines to maintain high signal integrity and tight
timing parameters. Any transmission line will hide the lumped
capacitive load at the end of the board trace, therefore,
ΣCL
is zero for controlled transmission line systems and can be
eliminated from equation 1. Using parallel termination output,
termination results in equation 2 for power dissipation.
In equation 2, P stands for the number of outputs with a
parallel or thevenin termination. VOL, IOL, VOH and IOH are a
function of the output termination technique, and DCQ is the
clock signal duty cycle. If transmission lines are used,
ΣCL is
zero in equation 2 and can be eliminated. In general, the use
of controlled transmission line techniques eliminates the
impact of the lumped capacitive loads at the end lines and
greatly reduces the power dissipation of the device.
Equation 3 describes the die junction temperature TJ as a
function of the power consumption.
Where Rthja is the thermal impedance of the package
(junction to ambient), and TA is the ambient temperature.
According to Figure 9, the junction temperature can be used
to estimate the long-term device reliability. Further, combining
equation 1 and equation 2 results in a maximum operating
frequency for the MPC9448 in a series terminated
transmission line system, equation 4.
17
Ω
MPC9448
Output
Buffer
RS = 16Ω
ZO = 50Ω
RS = 16Ω
ZO = 50Ω
17
Ω + 16Ω || 16Ω = 50Ω || 50Ω
25
Ω = 25Ω
Table 9. Die Junction Temperature and MTFB
Junction Temperature (
°C)
MTBF (Years)
100
20.4
110
9.1
120
4.2
130
2.0
PTOT = [ ICCQ + VCC fCLOCK ( N CPD + Σ CL ) ] VCC
M
PTOT = VCC [ ICCQ + VCC fCLOCK ( N CPD + Σ CL ) ] + Σ [ DCQ IOH (VCC – VOH) + (1 – DCQ) IOL VOL ]
M
P
TJ = TA + PTOT Rthja
Equation 1
Equation 2
Equation 3
Equation 4
fCLOCK,MAX =
CPD N V2CC
1
[
– (ICCQ VCC)
]
Rthja
Tj,MAX – TA
MPC9448
3.3 V/2.5 V LVCMOS 1:12 Clock Fanout Buffer
NETCOM
IDT 3.3 V/2.5 V LVCMOS 1:12 Clock Fanout Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC9448
7
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參數(shù)描述
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MPC9448D 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer
MPC9448FA 功能描述:時(shí)鐘緩沖器 2.5 3.3V 275MHz Clock Generator RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
MPC9448FAR2 功能描述:IC CLOCK BUFFER MUX 2:12 32-LQFP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器,驅(qū)動(dòng)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器(分配),多路復(fù)用器 電路數(shù):1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML,LVCMOS,LVPECL,LVTTL,SSTL 輸出:LVCMOS,LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP(7x7) 包裝:- 其它名稱:800-1923-6
MPC9449 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.3V / 2.5 V 1:15 PECL/LVCMOS