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參數(shù)資料
| 型號(hào)： | MPC940L |
| 廠商： | Motorola, Inc. |
| 元件分類： | FPGA |
| 英文描述： | 80000 SYSTEM GATE 1.5 VOLT FPGA |
| 中文描述： | 低壓1:18時(shí)鐘分配芯片 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 91K |
| 代理商： | MPC940L |
SEMICONDUCTOR TECHNICAL DATA
1
REV 0
Motorola, Inc. 1997
10/97
"
!
The MPC940L is a 1:18 low voltage clock distribution chip with 2.5V
LVCMOS output capabilities. The device features the capability to select
either a differential LVPECL or an LVTTL/ LVCMOS compatible input. The
18 outputs are 2.5V LVCMOS compatible and feature the drive strength
to drive 50
series or parallel terminated transmission lines. With
output–to–output skews of 150ps, the MPC940L is ideal as a clock
distribution chip for the most demanding of synchronous systems. The
2.5V outputs also make the device ideal for supplying clocks for a high
performance Pentium II
microprocessor based design.
LVPECL or LVCMOS/LVTTL Clock Input
2.5V LVCMOS Outputs for Pentium II Microprocessor Support
150ps Maximum Targeted Output–to–Output Skew
Maximum Output Frequency of 250MHz
32–Lead TQFP Packaging
Dual VCC Supply Voltage, 3.3V Core and 2.5V Output
With a low output impedance (
≈
30
), in both the HIGH and LOW logic
states, the output buffers of the MPC940L are ideal for driving series
terminated transmission lines. With this drive capability, the MPC940L
provides enough copies of low skew clocks for most high performance
synchronous systems.
The differential LVPECL inputs of the MPC940L allow the device to interface directly with a LVPECL fanout buffer like the
MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS/LVTTL input
provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In
addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH
on the LVCMOS_CLK_Sel pin will select the TTL level clock input.
The MPC940L is a dual supply device. The core VCC power pins (VCCI) require 3.3V with the output VCC pins (VCCO)
requiring 2.5V. The 32–lead TQFP package was chosen to optimize performance, board space and cost of the device. The
32–lead TQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.
Pentium II is a trademark of Intel Corporation.
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
LOW VOLTAGE
1:18 CLOCK
DISTRIBUTION CHIP
FA SUFFIX
32–LEAD TQFP PACKAGE
CASE 873A–02
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC940 | 80000 SYSTEM GATE 1.5 VOLT FPGA |
| MPC941 | LOW VOLTAGE 1:27 CLOCK DISTRIBUTION CHIP |
| MPC942C | LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP |
| MPC9443 | 80000 SYSTEM GATE 1.5 VOLT FPGA |
| MPC9447 | 80000 SYSTEM GATE 1.5 VOLT FPGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC940LAC | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 FSL 1-18 LVCMOS/LVPE CL to LVCMOS Fanout RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MPC940LACR2 | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 FSL 1-18 LVCMOS/LVPE CL to LVCMOS Fanout RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MPC940LFA | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 2.5 3.3V 250MHz Clock Generator RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MPC940LFAR2 | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 FSL 1-18 LVCMOS/LVPE CL to LVCMOS Fanout RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MPC941 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LOW VOLTAGE 1:27 CLOCK DISTRIBUTION CHIP |
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