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參數(shù)資料
| 型號： | MPC926508SDR2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 133.33 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封裝： | SSOP-20 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 129K |
| 代理商： | MPC926508SDR2 |
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order number: MPC926508/D
Rev 2, 02/2004
Motorola, Inc. 2004
Networking Clock Source
The MPC926508 is a low cost, low jitter, high performance clock
synthesizer for networking applications. Using analog Phase-Locked
Loop (PLL) techniques, the device accepts an input to produce multi-
ple output clocks for networking chips, PCI devices, SDRAM, and
ASICs. The MPC926508 outputs all have 0 ppm synthesis error.
Features
Packaged in 20 pin narrow (150 mil) SSOP (QSOP)
25 or 125 MHz fundamental clock input or 25 MHz crystal input
Two output clocks
SDRAM frequencies of 100 and 133 MHz
Zero ppm synthesis error in all clocks
Full CMOS output swing with 25 mA output drive capability at TTL
levels
Advanced, low power, sub-micron CMOS process
3.3V operating voltage
MPC926508
SD SUFFIX
20 LEAD SSOP
CASE 1461
NETWORKING
CLOCK SOURCE
SEL_25
OUT1 (100 MHz)
OUT2 (133.33
MHz)
SEL_CLK
Clock Synthesis
and Control
Circuitry
Output
Buffer
Output
Buffer
Clock
Buffer /
Crystal
Oscillator
VDD
GND
22
X1
X2
25 MHz or
125 MHz clock
or 25 MHz crys-
tal
*Optional crystal capacitors are shown and may be required for tuning of initial accuracy (determined
once per board).
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