參數(shù)資料
型號: MPC92433AER2
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 1428 MHz, OTHER CLOCK GENERATOR, PQFP48
封裝: ROHS COMPLIANT, LQFP-48
文件頁數(shù): 8/20頁
文件大小: 412K
代理商: MPC92433AER2
Advanced Clock Drivers Devices
16
Freescale Semiconductor
MPC92433
VCC_PLL Filter
The MPC92433 is a mixed analog/digital product. Its
analog circuitry is naturally susceptible to random noise,
especially if this noise is seen on the power supply pins.
Random noise on the VCC_PLL pin impacts the device AC
characteristics. The MPC92433 provides separate power
supplies for the digital circuitry (VCC) and the internal PLL
(VCC_PLL) of the device. The purpose of this design
technique is to isolate the high switching noise digital outputs
from the relatively sensitive internal analog phase-locked
loop. In digital system environments where it is more difficult
to minimize noise on the power supplies a second level of
isolation is recommended: a power supply filter on the
VCC_PLL pin for the MPC92433.
Figure 7. VCC_PLL Power Supply Filter
Figure 7 illustrates a recommended power supply filter
scheme.
The MPC92433 is most susceptible to noise with spectral
content in the 100 kHz to 1 MHz range. Therefore, the filter
should be designed to target this range. The key parameter
that needs to be met in the final filter design is the DC voltage
drop that will be seen between the VCC supply and the
VCC_PLL pin of the MPC92433. From the data sheet, the
VCC_PLL current (the current sourced through the VCC_PLL
pin) is maximum 10 mA, assuming that a minimum of 2.985 V
must be maintained on the VCC_PLL pin. The resistor shown
in Figure 7 must have a resistance of 1015
to meet the
voltage drop criteria. The minimum values for RF and the filter
capacitor CF are defined by the filter characteristics: the RC
filter should provide an attenuation greater than 40 dB for
noise whose spectral content is above 100 kHz. In the
recommended filter shown in Figure 7 the filter cut-off
frequency is around 3.04.5 kHz and the noise attenuation at
100 kHz is better than 42 dB.
As the noise frequency crosses the series resonant point
of an individual capacitor its overall impedance begins to look
inductive and thus increases with increasing frequency. The
parallel capacitor combination shown ensures that a low
impedance path to ground exists for frequencies well above
the bandwidth of the PLL.
The On-Chip Crystal Oscillator
The MPC92433 features an integrated on-chip crystal
oscillator to minimize system implementation cost. The
integrated oscillator is a Pierce-type that uses the crystal in
its parallel resonance mode. It is recommended to use a 15
to 20 MHz crystal with a load specification of CL =10 pF.
Crystals with a load specification of CL = 20 pF may be used
at the expense of an resulting slightly higher frequency than
specified for the crystal. Externally connected capacitors on
both the XTAL_IN and XTAL_OUT pins are not required but
can be used to fine-tune the crystal frequency as desired.
The crystal, the trace and optional capacitors should be
placed on the board as close as possible to the MPC92433
XTAL_IN and XTAL_OUT pins to reduce crosstalk of active
signals into the oscillator. Short and wide traces further
reduce parasitic inductance and resistance. It is further
recommended to guard the crystal circuit by placing a ground
ring around the traces and oscillator components.
RF = 10–15
VCC
CF = 22 F
10 nF
33...100 nF
VCC_PLL
VCC
MPC92433
7
Table 22. Recommended Crystal Specifications
Parameter
Value
Crystal Cut
Fundamental AT Cut
Resonance Mode
Parallel
Crystal Frequency
16–20 MHz
Shunt Capacitance C0
5–7 pF
Load Capacitance CL
10 pF
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