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參數(shù)資料
| 型號(hào)： | MPC905EFR2 |
| 廠(chǎng)商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK BUFFER 1:6 100MHZ 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類(lèi)型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:6 |
| 差分 - 輸入:輸出： | 是/無(wú) |
| 輸入： | 晶體 |
| 輸出： | LVCMOS |
| 頻率 - 最大： | 100MHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱(chēng)： | 800-1933-6 |
MPC905 REVISION 4 DECEMBER 18, 2012
3
2012 Integrated Device Technology, Inc.
MPC905 Data Sheet
1:6 PCI CLOCK GENERATOR/FANOUT BUFFR
Table 4. Recommended Operating Conditions
Symbol
Parameter
Min
Max
Unit
TA
Ambient Temperature Range
0
70
C
VCC
Positive Supply Voltage (Functional Range)
3.0
3.6
V
tDCin
Thigh (at XTAL_IN Input)
Tlow (at XTAL_IN Input)
0.44T(1)
1. When using External Source for reference, requirement to meet PCI clock duty cycle requirement on the output.
0.56T(1)
T = Period
Table 5. DC Characteristics (TA = 0–70°C; VDD = 3.3 V ± 0.3 V)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
VIH
High Level Input Voltage
2.0
5.5(2)
V
VIL
Low Level Input Voltage
0.8
V
VOH
High Level Output Voltage
2.4
V
IOH = –36 mA(1)
1. The MPC905 can drive 50
transmission lines on the incident edge. Each output drives one 50 parallel terminated transmission line to
VTT = VCC/2. Alternately, the device drives up to two 50 series terminated transmission lines per output.
VOL
Low Level Output Voltage
0.4
V
IOL = 36 mA(1)
IIH
Input High Current
2.5(2)
2. XTAL_IN input will sink up to 10mA when driven to 5.5 V. There are no reliability concerns associated with the condition. Note that the
ENABLE1 input must be a logic HIGH. Do not take the ENABLE1 input to a logic LOW with >VCC volts on the XTAL_IN input.
A
IIL
Input Low Current
2.5
A
ICC
Power Supply Current
DC
33 MHz
66 MHz
20
37
78
45
95
A
mA
CIN
Input Capacitance
XTAL_IN
Others
9.0
4.5
pF
Table 6. AC Characteristics (TA = 0–70C; VDD = 3.3 V 0.3 V)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
Fmax
Maximum Operating
Using External Crystal
Frequency
Using External Clock Source
—
DC
50
100
MHz
tpw
Output Pulse Width
HIGH (Above 2.0 V)
LOW (Below 0.8 V)
HIGH (Above 2.0 V)
LOW (Below 0.8 V)
0.40T(1)
0.45T(2)
0.45T(2)
1. Assuming input duty cycle specs from Recommended Operating Conditions table are met.
2. Assuming external crystal or 50% duty cycle external reference is used.
0.60T(1)
0.60T(1)
0.55T(2)
T = Periods
tper
Output Period
T - 400 ps
T = Desired
Period
tos
Output-to-Output Skew
Rising Edges
Falling Edges
400
500
ps
tr, tf
Rise/Fall Times (Slew Rate)
1.0
4.0
V/ns
Series
Terminated
Transmission
Lines
tEN
Enable Time
ENABLE1
ENABLE2
5.0
4.0
ms
Cycles
tDIS
Disable Time
ENABLE1
ENABLE2
4.0
Cycles
Aosc
XTAL_IN to XTAL_OUT Oscillator Gain
6.0
dB
Phase Loop Phase Shift Modulo 360
+
30
Degrees
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