參數(shù)資料
型號(hào): MPC885VR66
廠商: Freescale Semiconductor
文件頁數(shù): 4/87頁
文件大小: 0K
描述: IC MPU POWERQUICC 66MHZ 357PBGA
標(biāo)準(zhǔn)包裝: 44
系列: MPC8xx
處理器類型: 32-位 MPC8xx PowerQUICC
速度: 66MHz
電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 357-BBGA
供應(yīng)商設(shè)備封裝: 357-PBGA(25x25)
包裝: 托盤
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
12
Freescale Semiconductor
Thermal Calculation and Measurement
7
Thermal Calculation and Measurement
For the following discussions, PD= (VDDL × IDDL) + PI/O, where PI/O is the power dissipation of the I/O
drivers.
NOTE
The VDDSYN power dissipation is negligible.
7.1
Estimation with Junction-to-Ambient Thermal Resistance
An estimation of the chip junction temperature, T
J, in °C can be obtained from the following equation:
TJ = TA + (RθJA × PD)
where:
TA = ambient temperature (C)
RθJA = package junction-to-ambient thermal resistance (C/W)
PD = power dissipation in package
The junction-to-ambient thermal resistance is an industry standard value that provides a quick and easy
estimation of thermal performance. However, the answer is only an estimate; test cases have demonstrated
that errors of a factor of two (in the quantity TJ – TA) are possible.
Output high voltage, IOH = –2.0 mA, except XTAL and open-drain pins
VOH
2.4
V
Output low voltage
IOL = 2.0 mA (CLKOUT)
IOL = 3.2 mA
5
IOL = 5.3 mA
6
IOL = 7.0 mA (TXD1/PA14, TXD2/PA12)
IOL = 8.9 mA (TS, TA, TEA, BI, BB, HRESET, SRESET)
VOL
—0.5
V
1 The difference between V
DDL and VDDSYN cannot be more than 100 mV.
2 The signals PA[0:15], PB[14:31], PC[4:15], PD[3:15], PE(14:31), TDI, TDO, TCK, TRST, TMS, MII1_TXEN, MII_MDIO are 5-V
tolerant. The minimum voltage is still 2.0 V.
3 V
IL(max) for the I
2C interface is 0.8 V rather than the 1.5 V as specified in the I2C standard.
4 Input capacitance is periodically sampled.
5 A(0:31), TSIZ0/REG, TSIZ1, D(0:31), IRQ(2:4), IRQ6, RD/WR, BURST, IP_B(3:7), PA(0:11), PA13, PA15, PB(14:31),
PC(4:15), PD(3:15), PE(14:31), MII1_CRS, MII_MDIO, MII1_TXEN, and MII1_COL.
6 BDIP/GPL_B(5), BR, BG, FRZ/IRQ6, CS(0:7), WE(0:3), BS_A(0:3), GPL_A0/GPL_B0, OE/GPL_A1/GPL_B1,
GPL_A(2:3)/GPL_B(2:3)/CS(2:3), UPWAITA/GPL_A4, UPWAITB/GPL_B4, GPL_A5, ALE_A, CE1_A, CE2_A, OP(0:3), and
BADDR(28:30).
Table 6. DC Electrical Specifications (continued)
Characteristic
Symbol
Min
Max
Unit
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