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    參數(shù)資料
    型號(hào): MPC860DEVR50D4
    廠商: Freescale Semiconductor
    文件頁數(shù): 45/78頁
    文件大?。?/td> 0K
    描述: IC MPU POWERQUICC 50MHZ 357PBGA
    標(biāo)準(zhǔn)包裝: 44
    系列: MPC8xx
    處理器類型: 32-位 MPC8xx PowerQUICC
    速度: 50MHz
    電壓: 3.3V
    安裝類型: 表面貼裝
    封裝/外殼: 357-BBGA
    供應(yīng)商設(shè)備封裝: 357-PBGA(25x25)
    包裝: 托盤
    MPC860 PowerQUICC Family Hardware Specifications, Rev. 9
    Freescale Semiconductor
    5
    Features
    — Up to 8 Kbytes of dual-port RAM
    — 16 serial DMA (SDMA) channels
    — Three parallel I/O registers with open-drain capability
    Four baud-rate generators (BRGs)
    — Independent (can be tied to any SCC or SMC)
    — Allows changes during operation
    — Autobaud support option
    Four serial communications controllers (SCCs)
    — Ethernet/IEEE 802.3 standard optional on SCC1–4, supporting full 10-Mbps operation
    (available only on specially programmed devices)
    — HDLC/SDLC (all channels supported at 2 Mbps)
    — HDLC bus (implements an HDLC-based local area network (LAN))
    — Asynchronous HDLC to support point-to-point protocol (PPP)
    — AppleTalk
    — Universal asynchronous receiver transmitter (UART)
    — Synchronous UART
    — Serial infrared (IrDA)
    — Binary synchronous communication (BISYNC)
    — Totally transparent (bit streams)
    — Totally transparent (frame-based with optional cyclic redundancy check (CRC))
    Two SMCs (serial management channels)
    — UART
    — Transparent
    — General circuit interface (GCI) controller
    — Can be connected to the time-division multiplexed (TDM) channels
    One SPI (serial peripheral interface)
    — Supports master and slave modes
    — Supports multimaster operation on the same bus
    One I2C (inter-integrated circuit) port
    — Supports master and slave modes
    — Multiple-master environment support
    Time-slot assigner (TSA)
    — Allows SCCs and SMCs to run in multiplexed and/or non-multiplexed operation
    — Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user defined
    — 1- or 8-bit resolution
    — Allows independent transmit and receive routing, frame synchronization, and clocking
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