參數(shù)資料
型號: MPC8572VTATNB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 1200 MHz, MICROPROCESSOR, PBGA1023
封裝: 33 X 33 MM, LEAD FREE, PLASTIC, FCBGA-1023
文件頁數(shù): 120/138頁
文件大?。?/td> 1502K
代理商: MPC8572VTATNB
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 2
82
Freescale Semiconductor
PCI Express
15.2.4.1
Spread Spectrum Clock
SD1_REF_CLK/SD1_REF_CLK were designed to work with a spread spectrum clock (+0 to -0.5%
spreading at 30–33 kHz rate is allowed), assuming both ends have same reference clock. For better results,
a source without significant unintended modulation should be used.
SD2_REF_CLK/SD2_REF_CLK are not intended to be used with, and should not be clocked by, a spread
spectrum clock source.
15.3
SerDes Transmitter and Receiver Reference Circuits
Figure 54 shows the reference circuits for SerDes data lane’s transmitter and receiver.
Figure 54. SerDes Transmitter and Receiver Reference Circuits
The DC and AC specification of SerDes data lanes are defined in each interface protocol section below
(PCI Express, Serial Rapid IO or SGMII) in this document based on the application usage:
Note that external AC Coupling capacitor is required for the above three serial transmission protocols with
the capacitor value defined in specification of each protocol section.
16 PCI Express
This section describes the DC and AC electrical specifications for the PCI Express bus of the MPC8572E.
16.1
DC Requirements for PCI Express SD1_REF_CLK and
SD1_REF_CLK
For more information, see Section 15.2, “SerDes Reference Clocks.”
50
Ω
50
Ω
Receiver
Transmitter
SD1_TX
n or
SD2_TX
n
SD1_TX
n or
SD2_TX
n
SD1_RX
n or
SD2_RX
n
SD1_RX
n or
SD2_RX
n
50
Ω
50
Ω
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