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    參數(shù)資料
    型號: MPC8572ECVTARLE
    廠商: Freescale Semiconductor
    文件頁數(shù): 13/138頁
    文件大?。?/td> 0K
    描述: MPU POWERQUICC III 1023FCPBGA
    標準包裝: 1
    系列: MPC85xx
    處理器類型: 32-位 MPC85xx PowerQUICC III
    速度: 1.067GHz
    電壓: 1.1V
    安裝類型: 表面貼裝
    封裝/外殼: 1023-BBGA,F(xiàn)CBGA
    供應商設備封裝: 1023-FCPBGA(33x33)
    包裝: 托盤
    MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
    Freescale Semiconductor
    11
    Electrical Characteristics
    2.1
    Overall DC Electrical Characteristics
    This section covers the ratings, conditions, and other characteristics.
    2.1.1
    Absolute Maximum Ratings
    Table 1 provides the absolute maximum ratings.
    Table 1. Absolute Maximum Ratings1
    Characteristic
    Symbol
    Range
    Unit Notes
    Core supply voltage
    VDD
    –0.3 to 1.21
    V
    PLL supply voltage
    AVDD
    –0.3 to 1.21
    V
    Core power supply for SerDes transceivers
    SVDD
    –0.3 to 1.21
    V
    Pad power supply for SerDes transceivers
    XVDD
    –0.3 to 1.21
    V
    DDR SDRAM
    Controller I/O
    supply voltage
    DDR2 SDRAM Interface
    GVDD
    –0.3 to 1.98
    V
    DDR3 SDRAM Interface
    –0.3 to 1.65
    Three-speed Ethernet I/O, FEC management interface, MII
    management voltage
    LVDD (for eTSEC1
    and eTSEC2)
    –0.3 to 3.63
    –0.3 to 2.75
    V2
    TVDD (for eTSEC3
    and eTSEC4, FEC)
    –0.3 to 3.63
    –0.3 to 2.75
    —2
    DUART, system control and power management, I2C, and JTAG
    I/O voltage
    OVDD
    –0.3 to 3.63
    V
    Local bus and GPIO I/O voltage
    BVDD
    –0.3 to 3.63
    –0.3 to 2.75
    –0.3 to 1.98
    V—
    Input voltage
    DDR2 and DDR3 SDRAM interface signals
    MVIN
    –0.3 to (GVDD + 0.3)
    V
    3
    DDR2 and DDR3 SDRAM interface reference
    MVREFn
    –0.3 to (GVDD/2 + 0.3)
    V
    Three-speed Ethernet signals
    LVIN
    TVIN
    –0.3 to (LVDD + 0.3)
    –0.3 to (TVDD + 0.3)
    V3
    Local bus and GPIO signals
    BVIN
    –0.3 to (BVDD + 0.3)
    DUART, SYSCLK, system control and power
    management, I2C, and JTAG signals
    OVIN
    –0.3 to (OVDD + 0.3)
    V
    3
    Storage temperature range
    TSTG
    –55 to 150
    C
    C—
    Notes:
    1. Functional operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and functional
    operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause permanent
    damage to the device.
    2. The 3.63V maximum is only supported when the port is configured in GMII, MII, RMII or TBI modes; otherwise the 2.75V
    the recommended operating conditions per protocol.
    3. (M,L,O)VIN may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure 2.
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