參數(shù)資料
型號: MPC8568EVTAQGG
廠商: Freescale Semiconductor
文件頁數(shù): 2/139頁
文件大?。?/td> 0K
描述: MPU POWERQUICC III 1023-PBGA
標(biāo)準(zhǔn)包裝: 24
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.0GHz
電壓: 1.1V
安裝類型: 表面貼裝
封裝/外殼: 1023-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1023-FCPBGA(33x33)
包裝: 托盤
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
10
Freescale Semiconductor
Electrical Characteristics
1.2.15
System Performance Monitor
The performance monitor facility supports eight 32-bit counters that can count up to 512 counter-specific
events. It supports duration and quantity threshold counting and a burstiness feature that permits counting
of burst events with a programmable time between bursts.
2
Electrical Characteristics
This section provides the AC and DC electrical specifications and thermal characteristics for the
MPC8568E. This device is currently targeted to these specifications. Some of these specifications are
independent of the I/O cell, but are included for a more complete reference. These are not purely I/O buffer
design specifications.
2.1
Overall DC Electrical Characteristics
This section covers the ratings, conditions, and other characteristics.
2.1.1
Absolute Maximum Ratings
Table 2. Absolute Maximum Ratings 1
Characteristic
Symbol
Max Value
Unit Notes
Core supply voltage
VDD
–0.3 to 1.21
V
PLL supply voltage
AVDD_PLAT,
AVDD_CORE,
AVDD_CE,
AVDD_PCI,
AVDD_LBIU,
AVDD_SRDS
–0.3 to 1.21
V
Core power supply for SerDes transceiver
SCOREVDD
–0.3 to 1.21
V
Pad power supply for SerDes transceiver
XVDD
–0.3 to 1.21
V
DDR and DDR2 DRAM I/O voltage
GVDD
–0.3 to 2.75
–0.3 to 1.98
V—
eTSEC1, eTSEC2 I/O Voltage
LVDD
–0.3 to 3.63
–0.3 to 2.75
V—
QE UCC1/UCC2 Ethernet Interface I/O Voltage
TVDD
–0.3 to 3.63
–0.3 to 2.75
V—
PCI, DUART, system control and power management, I2C, and JTAG
I/O voltage
OVDD
–0.3 to 3.63
V
3
Local bus I/O voltage
BVDD
–0.3 to 3.63
–0.3 to 2.75
V3
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