
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
2
Freescale Semiconductor
MPC8568E Overview
1
MPC8568E Overview
This section provides a high-level overview of MPC8568E features.
Figure 1 shows the major functional
units within the MPC8568E.
Figure 1. MPC8568E Block Diagram
1.1
Key Features
Key features of the MPC8568E include:
High-performance Power Architecture e500v2 core with 36-bit physical addressing
512 Kbytes of level-2 cache
Core Complex
x4/x2/x1 PCI Express
4x/1x RapidIO and/or
66 MHz
PCI 32-bit
10/100/1Gb
MII, GMII, TBI,
RTBI, RGMII,
Serial
IRQs
SDRAM
DDR
Flash
SDRAM
Bus
I2C
I2C Controller
eTSEC
32-bit PCI Bus Interface
e500
Coherency
Module
DDR/DDR2/
Memory Controller
Local Bus Controller
Programmable Interrupt
Controller (PIC)
DUART
e500 Core
512-Kbyte
L2 Cache/
SRAM
32-Kbyte L1
Instruction
Cache
32-Kbyte
L1 Data
Cache
OceaN
Switch
Fabric
Serial RapidIO
and/or
PCI Express
4-Channel DMA
Controller
RMII
MPC8568
Security
Engine
XOR
Engine
I2C
I2C Controller
Table Lookup Unit
Baud Rate
Generators
Multi-User
RAM
UCC8
Parallel I/O
Accelerators
Dual 32-bit RISC CP
Serial DMA
&
2 Virtual
DMAs
Serial Interface
QUICC Engine
UCC7
UCC6
UCC5
UCC4
UCC3
UCC2
UCC1
MCC
SPI
2
Time Slot Assigner
SPI
1
3 GMII/
2 RGMII/TBI/RTBI
8 MII/
RMII
8 TDM Ports
2 UL2/POS
10/100/1Gb
MII, GMII, TBI,
RTBI, RGMII,
eTSEC
RMII
ZBT RAM
or x8 PCI Express