• 參數(shù)資料
    型號： MPC8548VUAQJB
    廠商： FREESCALE SEMICONDUCTOR INC
    元件分類： 微控制器/微處理器
    英文描述： 32-BIT, 1000 MHz, MICROPROCESSOR, CBGA783
    封裝： 29 X 29 MM, 1 MM PITCH, FLIP CHIP, LEAD FREE, CERAMIC, BGA-783
    文件頁數(shù)： 69/142頁
    文件大?。?/td> 1504K
    代理商： MPC8548VUAQJB
    MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
    32
    Freescale Semiconductor
    Enhanced Three-Speed Ethernet (eTSEC)
    Figure 11 shows the MII transmit AC timing diagram.
    Figure 11. MII Transmit AC Timing Diagram
    8.2.3.2
    MII Receive AC Timing Specifications
    Table 29 provides the MII receive AC timing specifications.
    Figure 12 provides the AC test load for eTSEC.
    Figure 12. eTSEC AC Test Load
    Table 29. MII Receive AC Timing Specifications
    Parameter/Condition
    Symbol1
    Min
    Typ
    Max
    Unit
    RX_CLK clock period 10 Mbps
    tMRX
    2
    —400
    —
    ns
    RX_CLK clock period 100 Mbps
    tMRX
    —40
    —
    ns
    RX_CLK duty cycle
    tMRXH/tMRX
    35
    —
    65
    %
    RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
    tMRDVKH
    10.0
    —
    ns
    RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
    tMRDXKH
    10.0
    —
    ns
    RX_CLK clock rise (20%–80%)
    tMRXR
    2
    1.0
    —
    4.0
    ns
    RX_CLK clock fall time (80%–20%)
    tMRXF
    2
    1.0
    —
    4.0
    ns
    Notes:
    1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
    inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMRDVKH symbolizes MII receive
    timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the tMRX clock reference (K)
    going to the high (H) state or setup time. Also, tMRDXKL symbolizes MII receive timing (GR) with respect to the time data input
    signals (D) went invalid (X) relative to the tMRX clock reference (K) going to the low (L) state or hold time. Note that, in general,
    the clock reference symbol representation is based on three letters representing the clock of a particular functional. For
    example, the subscript of tMRX represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used
    with the appropriate letter: R (rise) or F (fall).
    2. Guaranteed by design.
    TX_CLK
    TXD[3:0]
    tMTKHDX
    tMTX
    tMTXH
    tMTXR
    tMTXF
    TX_EN
    TX_ER
    Output
    Z0 = 50 Ω
    LVDD/2
    RL = 50 Ω
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