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    參數(shù)資料
    型號: MPC8548HXATGA
    廠商: FREESCALE SEMICONDUCTOR INC
    元件分類: 微控制器/微處理器
    英文描述: 32-BIT, 1200 MHz, MICROPROCESSOR, CBGA783
    封裝: 29 X 29 MM, 1 MM PITCH, FLIP CHIP, CERAMIC, BGA-783
    文件頁數(shù): 122/142頁
    文件大?。?/td> 1504K
    代理商: MPC8548HXATGA
    MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
    80
    Freescale Semiconductor
    Serial RapidIO
    For each baud rate at which an LP-serial transmitter is specified to operate, the output eye pattern of the
    transmitter shall fall entirely within the unshaded portion of the transmitter output compliance mask shown
    in Figure 52 with the parameters specified in Table 61 when measured at the output pins of the device and
    the device is driving a 100-
    Ω ± 5% differential resistive load. The output eye pattern of an LP-serial
    transmitter that implements pre-emphasis (to equalize the link and reduce inter-symbol interference) need
    only comply with the transmitter output compliance mask when pre-emphasis is disabled or minimized.
    Table 59. Long Run Transmitter AC Timing Specifications—2.5 GBaud
    Characteristic
    Symbol
    Range
    Unit
    Notes
    Min
    Max
    Output voltage
    VO
    –0.40
    2.30
    V
    Voltage relative to COMMON of either signal
    comprising a differential pair
    Differential output voltage
    VDIFFPP
    800
    1600
    mVp-p
    Deterministic jitter
    JD
    —0.17
    UI p-p
    Total jitter
    JT
    —0.35
    UI p-p
    Multiple output skew
    SMO
    1000
    ps
    Skew at the transmitter output between lanes of a
    multilane link
    Unit interval
    UI
    400
    ps
    ±100 ppm
    Table 60. Long Run Transmitter AC Timing Specifications—3.125 GBaud
    Characteristic
    Symbol
    Range
    Unit
    Notes
    Min
    Max
    Output voltage
    VO
    –0.40
    2.30
    V
    Voltage relative to COMMON of either signal
    comprising a differential pair
    Differential output voltage
    VDIFFPP
    800
    1600
    mVp-p
    Deterministic jitter
    JD
    —0.17
    UI p-p
    Total jitter
    JT
    —0.35
    UI p-p
    Multiple output skew
    SMO
    1000
    ps
    Skew at the transmitter output between lanes of a
    multilane link
    Unit interval
    UI
    320
    ps
    ±100 ppm
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
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