
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
116
Freescale Semiconductor
Package Description
Local Bus Controller Interface
LAD[0:31]
E27, B20, H19, F25, A20, C19, E28, J23, A25,
K22, B28, D27, D19, J22, K20, D28, D25, B25,
E22, F22, F21, C25, C22, B23, F20, A23, A22,
E19, A21, D21, F19, B21
I/O
BVDD
—
LDP[0:3]
K21, C28, B26, B22
I/O
BVDD
—
LA[27]
H21
O
BVDD
5, 9
LA[28:31]
H20, A27, D26, A28
O
BVDD
5, 7, 9
LCS[0:4]
J25, C20, J24, G26, A26
O
BVDD
—
LCS5/DMA_DREQ2
D23
I/O
BVDD
1
LCS6/DMA_DACK2
G20
O
BVDD
1
LCS7/DMA_DDONE2
E21
O
BVDD
1
LWE0/LBS0/LSDDQM[0]
G25
O
BVDD
5, 9
LWE1/LBS1/LSDDQM[1]
C23
O
BVDD
5, 9
LWE2/LBS2/LSDDQM[2]
J21
O
BVDD
5, 9
LWE3/LBS3/LSDDQM[3]
A24
O
BVDD
5, 9
LALE
H24
O
BVDD
5, 8, 9
LBCTL
G27
O
BVDD
5, 8, 9
LGPL0/LSDA10
F23
O
BVDD
5, 9
LGPL1/LSDWE
G22
O
BVDD
5, 9
LGPL2/LOE/LSDRAS
B27
O
BVDD
5, 8, 9
LGPL3/LSDCAS
F24
O
BVDD
5, 9
LGPL4/LGTA/LUPWAIT/LPBSE
H23
I/O
BVDD
—
LGPL5
E26
O
BVDD
5, 9
LCKE
E24
O
BVDD
—
LCLK[0:2]
E23, D24, H22
O
BVDD
—
LSYNC_IN
F27
I
BVDD
—
LSYNC_OUT
F28
O
BVDD
—
DMA
DMA_DACK[0:1]
AD3, AE1
O
OVDD
5, 9, 108
DMA_DREQ[0:1]
AD4, AE2
I
OVDD
—
DMA_DDONE[0:1]
AD2, AD1
O
OVDD
—
Programmable Interrupt Controller
UDE
AH16
I
OVDD
—
MCP
AG19
I
OVDD
—
Table 70. MPC8543E Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power
Supply
Notes