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      參數(shù)資料
      型號(hào): MPC8545EVUAQGA
      廠商: FREESCALE SEMICONDUCTOR INC
      元件分類: 微控制器/微處理器
      英文描述: 32-BIT, 1000 MHz, MICROPROCESSOR, CBGA783
      封裝: 29 X 29 MM, 1 MM PITCH, FLIP CHIP, LEAD FREE, CERAMIC, BGA-783
      文件頁數(shù): 27/142頁
      文件大?。?/td> 1504K
      代理商: MPC8545EVUAQGA
      MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
      122
      Freescale Semiconductor
      Clocking
      19 Clocking
      This section describes the PLL configuration of the MPC8548E. Note that the platform clock is identical
      to the core complex bus (CCB) clock.
      19.1
      Clock Ranges
      Table 71 through Table 73 provide the clocking specifications for the processor cores and Table 74,
      through Table 76 provide the clocking specifications for the memory bus.
      SD_IMP_CAL_TX
      AB26
      I
      100
      Ω (±1%)
      to GND
      SD_PLL_TPA
      U26
      O
      AVDD_SRDS
      24
      Note: All note references in this table use the same numbers as those for Table 67. The reader should refer to Table 67 for the
      meanings of these notes.
      Table 71. Processor Core Clocking Specifications (MPC8548E and MPC8547E)
      Characteristic
      Maximum Processor Core Frequency
      Unit
      Notes
      1000 MHz
      1200 MHz
      1333 MHz
      Min
      Max
      Min
      Max
      Min
      Max
      e500 core processor frequency
      800
      1000
      800
      1200
      800
      1333
      MHz
      1, 2
      Notes:
      1. Caution: The CCB to SYSCLK ratio and e500 core to CCB ratio settings must be chosen such that the resulting SYSCLK
      frequency, e500 (core) frequency, and CCB frequency do not exceed their respective maximum or minimum operating
      frequencies. Refer to Section 19.2, “CCB/SYSCLK PLL Ratio,and Section 19.3, “e500 Core PLL Ratio,for ratio settings.
      2.)The minimum e500 core frequency is based on the minimum platform frequency of 333 MHz.
      Table 72. Processor Core Clocking Specifications (MPC8545E)
      Characteristic
      Maximum Processor Core Frequency
      Unit
      Notes
      800 MHz
      1000 MHz
      1200 MHz
      Min
      Max
      Min
      Max
      Min
      Max
      e500 core processor frequency
      800
      1000
      800
      1200
      MHz
      1, 2
      Notes:
      1. Caution: The CCB to SYSCLK ratio and e500 core to CCB ratio settings must be chosen such that the resulting SYSCLK
      frequency, e500 (core) frequency, and CCB frequency do not exceed their respective maximum or minimum operating
      frequencies. Refer to Section 19.2, “CCB/SYSCLK PLL Ratio,and Section 19.3, “e500 Core PLL Ratio,for ratio settings.
      2.)The minimum e500 core frequency is based on the minimum platform frequency of 333 MHz.
      Table 70. MPC8543E Pinout Listing (continued)
      Signal
      Package Pin Number
      Pin Type
      Power
      Supply
      Notes
      相關(guān)PDF資料
      PDF描述
      MPC8547EVUAUJ 32-BIT, 1000 MHz, MICROPROCESSOR, CBGA783
      MPC8545CPXAQGB 32-BIT, 1000 MHz, MICROPROCESSOR, PBGA783
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      MPC8547ECVUAQJA 32-BIT, 1000 MHz, MICROPROCESSOR, CBGA783
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