參數(shù)資料
型號: MPC8544AVTANG
廠商: Freescale Semiconductor
文件頁數(shù): 70/117頁
文件大?。?/td> 0K
描述: IC MPU POWERQUICC III 783-FCBGA
產(chǎn)品培訓(xùn)模塊: MPC8544E PowerQUICC™ III
標(biāo)準(zhǔn)包裝: 1
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 800MHz
電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
配用: MPC8544DS-ND - BOARD DEVELOPMENT SYSTEM 8544
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 6
56
Freescale Semiconductor
JTAG
12 JTAG
This section describes the AC electrical specifications for the IEEE 1149.1 (JTAG) interface of the
MPC8544E.
12.1
JTAG DC Electrical Characteristics
Table 49 provides the DC electrical characteristics for the JTAG interface.
12.2
JTAG AC Electrical Specifications
Table 50 provides the JTAG AC timing specifications as defined in Figure 34 through Figure 37.
Table 49. JTAG DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
Notes
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
Input current (OVIN = 0 V or OVIN = OVDD)IIN
—±5
μA1
High-level output voltage (OVDD = min, IOH = –2 mA)
VOH
2.4
V
Low-level output voltage (OVDD = min, IOL = 2 mA)
VOL
—0.4
V
Note:
1. Note that the symbol VIN, in this case, represents the OVIN.
Table 50. JTAG AC Timing Specifications (Independent of SYSCLK)1
At recommended operating conditions (see Table 3).
Parameter
Symbol2
Min
Max
Unit
Notes
JTAG external clock frequency of operation
fJTG
033.3
MHz
JTAG external clock cycle time
tJTG
30
ns
JTAG external clock pulse width measured at 1.4 V
tJTKHKL
15
ns
JTAG external clock rise and fall times
tJTGR & tJTGF
02
ns
TRST assert time
tTRST
25
ns
3
Input setup times:
Boundary-scan data
TMS, TDI
tJTDVKH
tJTIVKH
4
0
ns
4
Input hold times:
Boundary-scan data
TMS, TDI
tJTDXKH
tJTIXKH
20
25
ns
4
Valid times:
Boundary-scan data
TDO
tJTKLDV
tJTKLOV
4
20
25
ns
5
Output hold times:
Boundary-scan data
TDO
tJTKLDX
tJTKLOX
2.5
4
ns
5
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