參數(shù)資料
型號: MPC8536ECVTAVLA
廠商: Freescale Semiconductor
文件頁數(shù): 26/126頁
文件大?。?/td> 0K
描述: MPU PWRQUICC III 1500MHZ 783PBGA
標準包裝: 1
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.5GHz
電壓: 1.1V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
其它名稱: MPC8536ECVTAVL
MPC8536ECVTAVL-ND
Ordering Information
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
121
The following pins must be connected to XGND if not used:
SD1_RX[7:0]
SD1_RX[7:0]
SD1_REF_CLK
SD1_REF_CLK
3.11.3
SerDes 2 Interface Entirely Unused
If the high-speed SerDes 2 interface (SGMII/ SATA) is not used at all, the unused pin should be terminated as described in this
section. See SerDes2 in Table 1 for details.
The following pins must be left unconnected (float):
SD2_TX[1:0]
SD2_TX[1:0]
Reserved pins L8, L9
The following pins must be connected to X2GND:
SD2_RX[1:0]
SD2_RX[1:0]
SD2_REF_CLK
SD2_REF_CLK
The POR configuration pin cfg_srds2_prtcl[0:2] on TSEC1_TXD[2], TSEC3_TXD[2], TSEC_1588_PUSLE_OUT1 can be
used to power down SerDes 2 block for power saving. Note that both S2VDD and X2VDD must remain powered.
3.11.4
SerDes 2 Interface Partly Unused
If only part of the high speed SerDes 2 (SGMII/SATA) interface pins are used, the remaining high-speed serial I/O pins should
be terminated as described in this section.
The following pins must be left unconnected (float) if not used:
SD2_TX[1:0]
SD2_TX[1:0]
Reserved pins: T22, T23
The following pins must be connected to X2GND if not used:
SD2_RX[1:0]
SD2_RX[1:0]
4
Ordering Information
Ordering information for the parts fully covered by this specification document is provided in Section 4.1, “Part Numbers Fully
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