參數(shù)資料
型號: MPC8536CVTAVLA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 1500 MHz, MICROPROCESSOR, PBGA783
封裝: 29 X 29 MM, 2.80 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, FCBGA-783
文件頁數(shù): 69/127頁
文件大?。?/td> 1893K
代理商: MPC8536CVTAVLA
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
Freescale Semiconductor
46
Figure 18 shows the GMII receive AC timing diagram.
Figure 18. GMII Receive AC Timing Diagram
2.9.2.3
MII AC Timing Specifications
This section describes the MII transmit and receive AC timing specifications.
2.9.2.3.1
MII Transmit AC Timing Specifications
Table 30 provides the MII transmit AC timing specifications.
Table 30. MII Transmit AC Timing Specifications
At recommended operating conditions with L/TVDD of 3.3 V ± 5%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
TX_CLK clock period 10 Mbps
tMTX
400
ns
TX_CLK clock period 100 Mbps
tMTX
—40
ns
TX_CLK duty cycle
tMTXH/tMTX
35
65
%
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
tMTKHDX
1
5
15
ns
TX_CLK data clock rise (20%-80%)
tMTXR
1.0
4.0
ns
TX_CLK data clock fall (80%-20%)
tMTXF
1.0
4.0
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state)
for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMTKHDX symbolizes MII
transmit timing (MT) for the time tMTX clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in
general, the clock reference symbol representation is based on two to three letters representing the clock of a particular
functional. For example, the subscript of tMTX represents the MII(M) transmit (TX) clock. For rise and fall times, the latter
convention is used with the appropriate letter: R (rise) or F (fall).
RX_CLK
RXD[7:0]
tGRDXKH
tGRX
tGRXH
tGRXR
tGRXF
tGRDVKH
RX_DV
RX_ER
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