參數(shù)資料
型號: MPC8535EBVTAKG
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 600 MHz, MICROPROCESSOR, PBGA783
封裝: 29 X 29 MM, 2.80 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, FCBGA-783
文件頁數(shù): 80/126頁
文件大?。?/td> 2861K
代理商: MPC8535EBVTAKG
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
Freescale Semiconductor
57
2.9.3.4
SGMII AC Timing Specifications
This section describes the SGMII transmit and receive AC timing specifications. Transmitter and receiver characteristics are
measured at the transmitter outputs (SD2_TX[n] and SD2_TX[n]) or at the receiver inputs (SD2_RX[n] and SD2_RX[n]) as
depicted in Figure 32 respectively.
2.9.3.4.1
SGMII Transmit AC Timing Specifications
Table 41 provides the SGMII transmit AC timing targets. A source synchronous clock is not provided.
Loss of signal threshold
LSTS = 0
VLOS
30
100
mV
3, 4
LSTS = 1
65
175
Input AC common mode voltage
VCM_ACp-p
——
100
mV
5
Receiver differential input impedance
ZRX_DIFF
80
100
120
Ω
Receiver common mode input
impedance
ZRX_CM
20
35
Ω
Common mode input voltage
VCM
—Vxcorevss
—V
6
Notes:
1. Input must be externally AC-coupled.
2. VRX_DIFFp-p is also referred to as peak to peak input differential voltage
3. The concept of this parameter is equivalent to the Electrical Idle Detect Threshold parameter in PCI Express. See PCI
Express Differential Receiver (RX) Input Specifications section for further explanation.
4. The LSTS shown in the table refers to the LSTSA or LSTSE bit field of MPC8535E’s SerDes 2 Control Register.
5. VCM_ACp-p is also referred to as peak to peak AC common mode voltage.
6. On-chip termination to S2GND (xcorevss).
Table 41. SGMII Transmit AC Timing Specifications
At recommended operating conditions with X2VDD = 1.0V ± 5%.
Parameter
Symbol
Min
Typ
Max
Unit
Notes
Deterministic Jitter
JD
0.17
UI p-p
Total Jitter
JT
0.35
UI p-p
Unit Interval
UI
799.92
800
800.08
ps
1
VOD fall time (80%-20%)
tfall
50
120
ps
VOD rise time (20%-80%)
trise
50
120
ps
Notes:
1. Each UI is 800 ps ± 100 ppm.
Table 40. SGMII DC Receiver Electrical Characteristics (continued)
Parameter
Symbol
Min
Typ
Max
Unit
Notes
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