
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Pin Assignments and Reset States
Freescale Semiconductor
12
DMA_DREQ[0:1]
/GPIO[14:15]
DMA Request
AB10,AD11
I
OVDD
—
DMA_DDONE[0:1]
/GPIO[12:13]
DMA Done
AA11,AB11
O
OVDD
—
DMA_DREQ[2]/LCS[5]
Chips selects / DMA Request H16
I/O
BVDD
1,29
DMA_DACK[2]/LCS[6]
Chips selects / DMA Ack
J16
O
BVDD
1,29
DMA_DDONE[2]/LCS[7]
Chips selects / DMA Done
L18
O
BVDD
1,29
DMA_DREQ[3]/IRQ[9]
External interrupt/DMA
request
AE13
I
OVDD
1
DMA_DACK[3]/IRQ[10]
External interrupt/DMA Ack
AD13
I/O
OVDD
1
DMA_DDONE[3]/IRQ[11]
External interrupt/DMA done
AD14
I/O
OVDD
1
USB Port 1
USB1_D[7:0]
USB1 Data bits
AF1,AE2,AE1,AD2,
AC2,AC1,AB2,AB1
I/O
OVDD
—
USB1_NXT
USB1 Next data
AF2
I
OVDD
—
USB1_DIR
USB1 Data Direction
AH1
I
OVDD
—
USB1_STP
USB1 Stop
AG1
O
OVDD
5,9
USB1_PWRFAULT
USB1 bus power fault.
AH2
I
OVDD
—
USB1_PCTL0/GPIO[6]
USB1 Port control 0
AC3
O
OVDD
—
USB1_PCTL1/GPIO[7]
USB1 Port control 1
AC4
O
OVDD
—
USB1_CLK
USB1 bus clock
AD1
I
OVDD
—
USB Port 2
USB2_D[7:0]
USB2 Data bits
AE6,AC6,AF5,AE5,
AF4,AE4,AE3,AD3
I/O
OVDD
—
USB2_NXT
USB2 Next data
AC7
I
OVDD
—
USB2_DIR
USB2 Data Direction
AF7
I
OVDD
—
USB2_STP
USB2 Stop
AD7
O
OVDD
5,9
USB2_PWRFAULT
USB2 bus power fault.
AC8
I
OVDD
—
USB2_PCTL0/GPIO[8]
USB2 Port control 0
AG9
O
OVDD
—
USB2_PCTL1/GPIO[9]
USB2 Port control 1
AC9
O
OVDD
—
USB2_CLK
USB2 bus clock
AD5
I
OVDD
—
—
Reserved
—
AH8
—
Reserved
—
AH7,AG6,AH6,AG5,
AG4,AH4,AG3,AH3,
AG7, AG8, AH9,AH5
——
27
Table 1. Pinout Listing (continued)
Signal
Signal Name
Package Pin Number
Pin Type
Power
Supply
Notes