- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3964 > MPC8360EZUALFH (Freescale Semiconductor)IC MPU PWRQUICC II 740-TBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | MPC8360EZUALFH |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 43/102頁 |
| 文件大小： | 0K |
| 描述： | IC MPU PWRQUICC II 740-TBGA |
| 標(biāo)準(zhǔn)包裝： | 21 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 667MHz |
| 電壓： | 1.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 740-LBGA |
| 供應(yīng)商設(shè)備封裝： | 740-TBGA（37.5x37.5） |
| 包裝： | 托盤 |
| 配用： | MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁當(dāng)前第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
Freescale Semiconductor
45
JTAG AC Electrical Characteristics
10.2
JTAG AC Electrical Characteristics
This section describes the AC electrical specifications for the IEEE 1149.1 (JTAG) interface of the device.
This table provides the JTAG AC timing specifications as defined in Figure 30 through Figure 33.
Table 43. JTAG AC Timing Specifications (Independent of CLKIN)1
At recommended operating conditions (see Table 2).
Parameter
Symbol 2
Min
Max
Unit
Notes
JTAG external clock frequency of operation
fJTG
033.3
MHz
—
JTAG external clock cycle time
tJTG
30
—
ns
—
JTAG external clock duty cycle
tJTKHKL/tJTG
45
55
%
—
JTAG external clock rise and fall times
tJTGR & tJTGF
02
ns
—
TRST assert time
tTRST
25
—
ns
Input setup times:
Boundary-scan data
TMS, TDI
tJTDVKH
tJTIVKH
4
—
ns
Input hold times:
Boundary-scan data
TMS, TDI
tJTDXKH
tJTIXKH
10
—
ns
Valid times:
Boundary-scan data
TDO
tJTKLDV
tJTKLOV
2
11
ns
Output hold times:
Boundary-scan data
TDO
tJTKLDX
tJTKLOX
2
—
ns
JTAG external clock to output high impedance:
Boundary-scan data
TDO
tJTKLDZ
tJTKLOZ
2
19
9
ns
Notes:
1. All outputs are measured from the midpoint voltage of the falling/rising edge of tTCLK to the midpoint of the signal in
question. The output timings are measured at the pins. All output timings assume a purely resistive 50-
Ω load (see
Figure 22). Time-of-flight delays must be added for trace lengths, vias, and connectors in the system.
2. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state)
(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tJTDVKH
symbolizes JTAG device timing (JT) with respect to the time data input signals (D) reaching the valid state (V) relative to
the tJTG clock reference (K) going to the high (H) state or setup time. Also, tJTDXKH symbolizes JTAG timing (JT) with respect
to the time data input signals (D) went invalid (X) relative to the tJTG clock reference (K) going to the high (H) state. Note
that, in general, the clock reference symbol representation is based on three letters representing the clock of a particular
functional. For rise and fall times, the latter convention is used with the appropriate letter: R (rise) or F (fall).
3. TRST is an asynchronous level sensitive signal. The setup time is for test purposes only.
4. Non-JTAG signal input timing with respect to tTCLK.
5. Non-JTAG signal output timing with respect to tTCLK.
6. Guaranteed by design and characterization.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7027S25G | IC SRAM 512KBIT 25NS 108PGA |
| IDT70T3589S133DRI | IC SRAM 2MBIT 133MHZ 208QFP |
| 52806-0610 | CONN FFC/FPC 6POS 1MM VERT T/H |
| IDT70V7519S166BCI8 | IC SRAM 9MBIT 166MHZ 256BGA |
| MPC8360VVADDH | IC MPU PWRQUICC II 740-TBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8360EZUALFHA | 功能描述:微處理器 - MPU 8360 TBGA ENCRP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8360TVVAGDGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC⑩ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360TVVAGDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC⑩ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360TVVAGFGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC⑩ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360TVVAGFHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC⑩ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。