參數(shù)資料
型號: MPC8360EZUAJDGA
廠商: Freescale Semiconductor
文件頁數(shù): 2/102頁
文件大小: 0K
描述: IC MPU POWERQUICC II PRO 740TBGA
標準包裝: 21
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 533MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 740-LBGA
供應(yīng)商設(shè)備封裝: 740-TBGA(37.5x37.5)
包裝: 托盤
配用: MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM
MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
10
Freescale Semiconductor
Overall DC Electrical Characteristics
This figure shows the undershoot and overshoot voltages at the interfaces of the device.
Figure 3. Overshoot/Undershoot Voltage for GVDD/OVDD/LVDD
PCI, local bus, DUART, system control and power management, I2C,
SPI, and JTAG I/O voltage
OVDD
3.3 V ± 330 mV
V
Junction temperature
TJ
0 to 105
–40 to 105
° C
Notes:
1. GVDD, LVDD, OVDD, AVDD, and VDD must track each other and must vary in the same direction—either in the positive or
negative direction.
2. The operating conditions for junction temperature, TJ, on the 600/333/400 MHz and 500/333/500 MHz on rev. 2.0 silicon is
0
° to 70 ° C. Refer to Errata General9 in Chip Errata for the MPC8360E, Rev. 1.
3. For more information on Part Numbering, refer to Table 80.
Table 2. Recommended Operating Conditions (continued)
Characteristic
Symbol
Recommended
Value
Unit
Notes
GND
GND – 0.3 V
GND – 0.7 V
Not to Exceed 10%
G/L/OVDD + 20%
G/L/OVDD
G/L/OVDD + 5%
of tinterface
1
1. Note that tinterface refers to the clock period associated with the bus clock interface.
VIH
VIL
Note:
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