參數(shù)資料
型號(hào): MPC8360EVVAGDG
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 83/102頁(yè)
文件大?。?/td> 0K
描述: IC MPU PWRQUICC II 740-TBGA
標(biāo)準(zhǔn)包裝: 21
系列: MPC83xx
處理器類(lèi)型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1.2V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 740-LBGA
供應(yīng)商設(shè)備封裝: 740-TBGA(37.5x37.5)
包裝: 托盤(pán)
配用: MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM
MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
Freescale Semiconductor
81
Pinout Listings
This figure shows the internal distribution of clocks within the MPC8358E.
Figure 55. MPC8358E Clock Subsystem
The primary clock source for the device can be one of two inputs, CLKIN or PCI_CLK, depending on whether the device is
configured in PCI host or PCI agent mode. Note that in PCI host mode, the primary clock input also depends on whether PCI
clock outputs are selected with RCWH[PCICKDRV]. When the device is configured as a PCI host device (RCWH[PCIHOST]
= 1) and PCI clock output is selected (RCWH[PCICKDRV] = 1), CLKIN is its primary input clock. CLKIN feeds the PCI clock
divider (
÷2) and the multiplexors for PCI_SYNC_OUT and PCI_CLK_OUT. The CFG_CLKIN_DIV configuration input
selects whether CLKIN or CLKIN/2 is driven out on the PCI_SYNC_OUT signal. The OCCR[PCIOENn] parameters enable
the PCI_CLK_OUTn, respectively.
PCI_SYNC_OUT is connected externally to PCI_SYNC_IN to allow the internal clock subystem to synchronize to the system
PCI clocks. PCI_SYNC_OUT must be connected properly to PCI_SYNC_IN, with equal delay to all PCI agent devices in the
system, to allow the device to function. When the device is configured as a PCI agent device, PCI_CLK is the primary input
Core PLL
System
LBIU
LSYNC_IN
LSYNC_OUT
LCLK[0:2]
core_clk
e300 Core
csb_clk to Rest
CLKIN
csb_clk
MPC8358E
Local Bus
PCI_CLK_OUT[0:2]
PCI_SYNC_OUT
PCI_CLK/
Clock
Unit
of the Device
lb_clk
CFG_CLKIN_DIV
PCI Clock
PCI_SYNC_IN
Memory
Device
/n
DLL
Divider
MEMC1_MCK[0:5]
DDRC
/2
ddr1_clk
DDRC
Memory
Device
PLL
QUICC
PLL
ce_clk to QUICC Engine Block
Engine
相關(guān)PDF資料
PDF描述
MPC8360CZUAJDG IC MPU POWERQUICC II 740-TBGA
MPC8360ECVVADDH IC MPU PWRQUICC II 740-TBGA
MPC8360ECVVAGDG IC MPU PWRQUICC II 740-TBGA
MPC8360EVVAHFH IC MPU PWRQUICC II 740-TBGA
MPC8360ECVVAJDG IC MPU PWRQUICC II 740-TBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8360EVVAGDGA 功能描述:微處理器 - MPU 8360 TBGA ENCRP NO-PB RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8360EVVAGDHA 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360EVVAGFGA 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360EVVAGFHA 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360EVVAHFH 功能描述:微處理器 - MPU 8360 TBGA ENC NO-PB RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324