參數(shù)資料
型號(hào): MPC8360ECVVAGDGA
廠(chǎng)商: Freescale Semiconductor
文件頁(yè)數(shù): 34/102頁(yè)
文件大小: 0K
描述: IC MPU POWERQUICC II PRO 740TBGA
標(biāo)準(zhǔn)包裝: 21
系列: MPC83xx
處理器類(lèi)型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1.2V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 740-LBGA
供應(yīng)商設(shè)備封裝: 740-TBGA(37.5x37.5)
包裝: 托盤(pán)
配用: MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM
MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
Freescale Semiconductor
37
Ethernet Management Interface Electrical Characteristics
8.3.2
MII Management AC Electrical Specifications
This table provides the MII management AC timing specifications.
This figure shows the MII management AC timing diagram.
Figure 21. MII Management Interface Timing Diagram
Table 37. MII Management AC Timing Specifications
At recommended operating conditions with LVDD is 3.3 V ± 10%.
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
Notes
MDC frequency
fMDC
—2.5
MHz
MDC period
tMDC
—400
ns
MDC clock pulse width high
tMDCH
32
ns
MDC to MDIO delay
tMDTKHDX
tMDTKHDV
10
——
110
ns
MDIO to MDC setup time
tMDRDVKH
10
ns
MDIO to MDC hold time
tMDRDXKH
0—
ns
MDC rise time
tMDCR
10
ns
MDC fall time
tMDHF
10
ns
Notes:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMDKHDX symbolizes
management data timing (MD) for the time tMDC from clock reference (K) high (H) until data outputs (D) are invalid (X) or
data hold time. Also, tMDRDVKH symbolizes management data timing (MD) with respect to the time data input signals (D)
reach the valid state (V) relative to the tMDC clock reference (K) going to the high (H) state or setup time. For rise and fall
times, the latter convention is used with the appropriate letter: R (rise) or F (fall).
2. This parameter is dependent on the csb_clk speed (that is, for a csb_clk of 267 MHz, the maximum frequency is 8.3 MHz
and the minimum frequency is 1.2 MHz; for a csb_clk of 375 MHz, the maximum frequency is 11.7 MHz and the minimum
frequency is 1.7 MHz).
3. This parameter is dependent on the ce_clk speed (that is, for a ce_clk of 200 MHz, the delay is 90 ns and for a ce_clk of
300 MHz, the delay is 63 ns).
MDC
tMDRDXKH
tMDC
tMDCH
tMDCR
tMDHF
tMDTKHDX
MDIO
(Input)
(Output)
tMDRDVKH
相關(guān)PDF資料
PDF描述
XPC8240LZU200E MCU HOST PROCESSOR 352-TBGA
MPC862PZQ50B IC MPU PWRQUICC 50MHZ 357-PBGA
MPC862PVR50B IC MPU POWERQUICC 50MHZ 357PBGA
FMC26DREI CONN EDGECARD 52POS .100 EYELET
MPC8270CZUQLDA IC MPU POWERQUICC II 480-TBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8360ECVVAGDHA 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360ECVVAGFGA 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360ECVVAGFHA 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360ECVVAJDG 功能描述:微處理器 - MPU 8360 TBGA ENCRP NO-PB RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8360ECVVAJDGA 功能描述:微處理器 - MPU 8360 TBGA C ENC NO-PB RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324