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參數(shù)資料
| 型號： | MPC8270ZUQLDA |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 28/83頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC II 480-TBGA |
| 標準包裝： | 21 |
| 系列： | MPC82xx |
| 處理器類型： | 32-位 MPC82xx PowerQUICC II |
| 速度： | 333MHz |
| 電壓： | 1.5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 480-LBGA |
| 供應商設備封裝： | 408-TBGA（37.5x37.5） |
| 包裝： | 托盤 |
| 其它名稱： | MPC8270ZUQLD MPC8270ZUQLD-ND |
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MPC8280 PowerQUICC II Family Hardware Specifications, Rev. 2
34
Freescale Semiconductor
Clock Configuration Modes
1 The “l(fā)ow” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry
guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only.
Users must select a mode and input bus frequency so that the resulting configuration does not violate the frequency rating of
the user’s device. The minimum CPM frequency is 120 MHz. Minimum CPU frequency is determined by the clock mode. For
modes with a CPU multiplication factor <= 3, the minimum CPU frequency is 150 MHz for commercial temperature devices
and 175 MHz for extended temperature devices. For modes with a CPU multiplication factor >= 3.5: for Rev0.1 the minimum
CPU frequency is 250 MHz; for Rev A or later the minimum CPU frequency is 150 MHz for commercial temperature devices
and 175 MHz for extended temperature devices.
2 As Table 17 shows, PCI_MODCK determines the PCI clock frequency range. See Table 20 for lower configurations.
3 MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.
4 60x and local bus frequency. Identical to CLKIN.
5 CPM multiplication factor = CPM clock/bus clock
6 CPU multiplication factor = Core PLL multiplication factor
Table 20. Clock Configurations for PCI Host Mode (PCI_MODCK=1)1,2
Mode3
Bus Clock4
(MHz)
CPM
Multiplication
Factor5
CPM Clock
(MHz)
CPU
Multiplication
Factor6
CPU Clock
(MHz)
PCI
Division
Factor
PCI Clock
(MHz)
MODCK_H-
MODCK[1-3]
Low
High
Low
High
Low
High
Low High
Default Modes (MODCK_H=0000)
0000_000
60.0
100.0
2
120.0 200.0
2.5
150.0 250.0
4
30.0
50.0
0000_001
50.0
100.0
2
100.0 200.0
3
150.0 300.0
4
25.0
50.0
0000_010
60.0
120.0
2.5
150.0 300.0
3
180.0 360.0
6
25.0
50.0
0000_011
60.0
120.0
2.5
150.0 300.0
3.5
210.0 420.0
6
25.0
50.0
0000_100
60.0
120.0
2.5
150.0 300.0
4
240.0 480.0
6
25.0
50.0
0000_101
50.0
100.0
3
150.0 300.0
3
150.0 300.0
6
25.0
50.0
0000_110
50.0
100.0
3
150.0 300.0
3.5
175.0 350.0
6
25.0
50.0
0000_111
50.0
100.0
3
150.0 300.0
4
200.0 400.0
6
25.0
50.0
Full Configuration Modes
0001_000
50.0
100.0
3
150.0 300.0
5
250.0 500.0
6
25.0
50.0
0001_001
50.0
100.0
3
150.0 300.0
6
300.0 600.0
6
25.0
50.0
0001_010
50.0
100.0
3
150.0 300.0
7
350.0 700.0
6
25.0
50.0
0001_011
50.0
100.0
3
150.0 300.0
8
400.0 800.0
6
25.0
50.0
0010_000
50.0
100.0
4
200.0 400.0
5
250.0 500.0
8
25.0
50.0
0010_001
50.0
100.0
4
200.0 400.0
6
300.0 600.0
8
25.0
50.0
0010_010
50.0
100.0
4
200.0 400.0
7
350.0 700.0
8
25.0
50.0
0010_011
50.0
100.0
4
200.0 400.0
8
400.0 800.0
8
25.0
50.0
0010_100
37.5
75.0
4
150.0 300.0
5
187.5 375.0
6
25.0
50.0
0010_101
37.5
75.0
4
150.0 300.0
5.5
206.3 412.5
6
25.0
50.0
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