參數(shù)資料
型號(hào): MPC8260CZUHFBC
廠商: MOTOROLA INC
元件分類(lèi): 微控制器/微處理器
英文描述: 32-BIT, 166 MHz, RISC PROCESSOR, PBGA480
封裝: 37.50 X 37.50 MM, 1.55 MM HEIGHT, 1.27 MM PITCH, TBGA-480
文件頁(yè)數(shù): 15/48頁(yè)
文件大?。?/td> 688K
代理商: MPC8260CZUHFBC
22
MPC826xA (HiP4) Family Hardware Specications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Clock Conguration Modes
1.3.2
PCI Mode
This section pertains to the MPC8265A and the MPC8266A only.
In PCI mode only, MODCK_HI[0:3] and PCI_MODCK come from the following external pins:
PCI_MODCK = LGPL5
MODCK_HI[0:3] = {LGPL0,LGPL1,LGPL2,LGPL3}
NOTE
The minimum Tval = 2 when PCI_MODCK = 1 and minimum Tval = 1
when PCI_MODCK = 0; therefore, board designers should use clock
congurations that t this condition to achieve PCI-compliant AC timing.
0110_111
66 MHz
2.5
166 MHz
4
266 MHz
0111_000
66 MHz
2.5
166 MHz
4.5
300 MHz
0111_001
66 MHz
3
200 MHz
2
133 MHz
0111_010
66 MHz
3
200 MHz
2.5
166 MHz
0111_011
66 MHz
3
200 MHz
3
200 MHz
0111_100
66 MHz
3
200 MHz
3.5
233 MHz
0111_101
66 MHz
3
200 MHz
4
266 MHz
0111_110
66 MHz
3
200 MHz
4.5
300 MHz
0111_111
66 MHz
3.5
233 MHz
2
133 MHz
1000_000
66 MHz
3.5
233 MHz
2.5
166 MHz
1000_001
66 MHz
3.5
233 MHz
3
200 MHz
1000_010
66 MHz
3.5
233 MHz
3.5
233 MHz
1000_011
66 MHz
3.5
233 MHz
4
266 MHz
1000_100
66 MHz
3.5
233 MHz
4.5
300 MHz
1100_0004
66 MHz
2
133 MHz
Bypass
66 MHz
1100_0014
66 MHz
2.5
166 MHz
Bypass
66 MHz
1100_0104
66 MHz
3
200 MHz
Bypass
66 MHz
1 Because of speed dependencies, not all of the possible congurations in Table 15 are applicable.
2 The user should choose the input clock frequency and the multiplication factors such that the frequency of the
CPU is equal to or greater than 133 MHz (150 MHz for extended temperature parts) and the CPM ranges
between 66–233 MHz.
3 66 MHz congurations are required for input clock frequencies higher than 50 MHz;
33 MHz congurations are required for input clock frequencies below 50 MHz.
4 At this mode the CPU PLL is bypassed (the CPU frequency equals the bus frequency).
Table 15. Clock Configuration Modes1 (Continued)
MODCK_H–MODCK[1–3]
Input Clock
Frequency2,3
CPM Multiplication
Factor2
CPM
Frequency2
Core Multiplication
Factor2
Core
Frequency2
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