參數(shù)資料
型號(hào)： MPC755CVT400LE
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, RISC PROCESSOR, PBGA360
封裝： 25 X 25 MM, 2.77 MM HEIGHT, 1.27 MM PITCH, LEAD FREE, PLASTIC, BGA-360
文件頁(yè)數(shù)： 1/60頁(yè)
文件大?。?/td> 1559K
代理商： MPC755CVT400LE
Freescale Semiconductor, Inc., 2005. All rights reserved.
Freescale Semiconductor
Technical Data
This document is primarily concerned with the MPC755;
however, unless otherwise noted, all information here also
applies to the MPC745. The MPC755 and MPC745 are
reduced instruction set computing (RISC) microprocessors
that implement the PowerPC instruction set architecture.
This document describes pertinent physical characteristics of
the MPC755. For information on specific MPC755 part
numbers covered by this or other specifications, see
characteristics of the processor, refer to the MPC750 RISC
Microprocessor Family User’s Manual.
To locate any published errata or updates for this document,
refer to the website at http://www.freescale.com.
1
Overview
The MPC755 is targeted for low-cost, low-power systems
and supports the following power management
features—doze, nap, sleep, and dynamic power
management. The MPC755 consists of a processor core and
an internal L2 tag combined with a dedicated L2 cache
interface and a 60x bus. The MPC745 is identical to the
MPC755 except it does not support the L2 cache interface.
Figure 1 shows a block diagram of the MPC755.
Document Number: MPC755EC
Rev. 7.0, 04/2005
Contents
MPC755
RISC Microprocessor
Hardware Specifications
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