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參數(shù)資料
| 型號： | MPC7457EC |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | RISC Microprocessor Hardware Specifications |
| 中文描述： | RISC微處理器硬件規(guī)格 |
| 文件頁數(shù)： | 11/68頁 |
| 文件大小： | 1755K |
| 代理商： | MPC7457EC |
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MPC7457 RISC Microprocessor Hardware Specifications, Rev. 5
Freescale Semiconductor
11
Electrical and Thermal Characteristics
Figure 2
shows the undershoot and overshoot voltage on the MPC7457.
Figure 2. Overshoot/Undershoot Voltage
The MPC7457 provides several I/O voltages to support both compatibility with existing systems and migration to
future systems. The MPC7457 core voltage must always be provided at nominal 1.3 V (see
Table 4
for actual
recommended core voltage). Voltage to the L3 I/Os and processor interface I/Os are provided through separate sets
of supply pins and may be provided at the voltages shown in
Table 3
. The input voltage threshold for each bus is
selected by sampling the state of the voltage select pins at the negation of the signal HRESET. The output voltage
will swing from GND to the maximum voltage applied to the OV
DD
or GV
DD
power pins.
Storage temperature range
T
stg
–55 to 150
°C
Notes
:
1.
Functional and tested operating conditions are given in
Table 4
. Absolute maximum ratings are stress ratings only, and
functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause
permanent damage to the device.
Caution
: V
DD
/AV
DD
must not exceed OV
DD
/GV
DD
by more than 1.0 V during normal operation; this limit may be exceeded
for a maximum of 20 ms during power-on reset and power-down sequences.
Caution
: OV
DD
/GV
DD
must not exceed V
DD
/AV
DD
by more than 2.0 V during normal operation; this limit may be exceeded
for a maximum of 20 ms during power-on reset and power-down sequences.
BVSEL must be set to 0, such that the bus is in 1.8-V mode.
BVSEL must be set to HRESET or 1, such that the bus is in 2.5-V mode.
L3VSEL must be set to HRESET (inverse of HRESET), such that the bus is in 1.5-V mode.
L3VSEL must be set to 0, such that the bus is in 1.8-V mode.
L3VSEL must be set to HRESET or 1, such that the bus is in 2.5-V mode.
Caution
: Vin must not exceed OV
DD
or GV
DD
by more than 0.3 V at any time including during power-on reset.
10. V
in
may overshoot/undershoot to a voltage and for a maximum duration as shown in
Figure 2
.
2.
3.
4.
5.
6.
7.
8.
9.
Table 2. Absolute Maximum Ratings
1
(continued)
Characteristic
Symbol
Maximum Value
Unit
Notes
V
IH
GND
GND – 0.3 V
GND – 0.7 V
Not to exceed 10%
of t
SYSCLK
OV
DD
/GV
DD
+ 20%
OV
DD
/GV
DD
+ 5%
V
IL
OV
DD
/GV
DD
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