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參數(shù)資料
| 型號(hào)： | MPC7447ANXPNS |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | PowerPC microprocessor |
| 中文描述： | PowerPC微處理器 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 254K |
| 代理商： | MPC7447ANXPNS |
MOTOROLA
MPC7447A Part Number Specification for the MC7447AnnnnNx Series
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
For More Information On This Product,
Go to: www.freescale.com
3
General Parameters
Table 7 provides the power consumption for the MPC7447A part numbers described herein. For
information regarding power consumption when dynamic frequency switching (DFS) is enabled, see the
MPC7447A RISC Microprocessor Hardware Specifications
.
Table 7. Power Consumption for MPC7447A
Processor (CPU) Frequency
Unit
Notes
1000 MHz
1167 MHz
Full-Power Mode
Typical
8.0
9.2
W
1, 2
Maximum
11.5
13.0
W
1, 3
Nap Mode
Typical
1.3
1.3
W
1, 2
Sleep Mode
Typical
1.3
1.3
W
1, 2
Deep Sleep Mode (PLL Disabled)
Typical
1.2
1.2
W
1, 2
Notes:
1. These values apply for all valid processor buses. The values do not include I/O supply
power (OV
DD
) or PLL supply power (AV
DD
). OV
DD
power is system dependent but is
typically < 5% of V
DD
power. Worst case power consumption for AV
DD
< 3 mW.
2. Typical power is an average value measured at the nominal recommended V
DD
(see
Table 4) and 65
°
C while running the Dhrystone 2.1 benchmark and achieving 2.3
Dhrystone MIPs/MHz.
3. Maximum power is the average measured at nominal V
DD
and maximum operating
junction temperature (see Table 4) while running an entirely cache-resident, contrived
sequence of instructions which keep all the execution units maximally busy.
4. Doze mode is not a user-definable state; it is an intermediate state between full-power and
either nap or sleep mode. As a result, power consumption for this mode is not tested.
F
Freescale Semiconductor, Inc.
n
.
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