參數(shù)資料
型號: MPC566MZP40R2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PBGA388
封裝: 27 X 27 MM, 1 MM PITCH, PLASTIC, BGA-388
文件頁數(shù): 7/12頁
文件大?。?/td> 139K
代理商: MPC566MZP40R2
MPC565/MPC566
PRODUCT BRIEF
MOTOROLA
4
TOUCAN_C pins shared with MIOS14 GPIO pins
Two Queued Serial Modules with One Queued-SPI and two SCI Each (QSMCM_A,
QSMCM_B)
QSMCM_A matches full MPC555/MPC556 QSMCM functionality
QSMCM_B has pins muxed with DLCMD2 module
— Two pins are muxed with DLCMD2 (J1850) transmit and receive pins (B_PCS3_J1850_TX
and B_RXD2_J1850_RX)
— QSMCM_B vs J1850 mux control provided by QPAPCS3 bit in QSMCM pin assignment reg-
ister (PQSPAR)
Queued-SPI
— Provides full-duplex communication port for peripheral expansion or interprocessor communi-
cation
— Up to 32 preprogrammed transfers, reducing overhead
— Synchronous serial interface with baud rate of up to system clock / 4
— Four programmable peripheral-selects pins support up to 16 devices
— Special wrap-around mode allows continuous sampling of a serial peripheral for efficient inter-
facing to serial analog-to-digital (A/D) converters
SCI
— UART mode provides NRZ format and half- or full-duplex interface
— 16 register receive buffer and 16 register transmit buffer on one SCI
— Advanced error detection, and optional parity generation and detection
— word length programmable as eight or nine bits
— Separate transmitter and receiver enable bits, and double buffering of data
— Wake-up functions allow the CPU to run uninterrupted until either a true idle line is detected,
or a new address byte is received
— External source clock for baud generation
Available in package
— Plastic ball grid array (PBGA) packaging
352/388 ball PBGA
27 mm x 27 mm body size
1.0 mm ball pitch
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