參數(shù)資料
型號： MPC5668GF0AVMJ
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 116 MHz, MICROCONTROLLER, PBGA256
封裝： 17 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, MAPBGA-256
文件頁數(shù)： 17/66頁
文件大?。?/td> 889K
代理商： MPC5668GF0AVMJ
MPC5668x Microcontroller Data Sheet, Rev. 3
Preliminary—Subject to Change Without Notice
Pin Assignments
Freescale Semiconductor
24
MDO11 MDO[11]
—
— Nexus Message Data Out
O
VDDENEX
F—
—
M7
Miscellaneous Pins (9)
EXTAL
EXTCLK
—
— Main Crystal Oscillator Input
External Clock Input
I
VDDSYN
A
EXTAL
A14
XTAL
—
— Main Crystal Oscillator Output
O
VDDSYN
AXTAL
A13
TDI
—
— JTAG Test Data Input
I
VDDE2
SH
TDI (Pull Up)
J3
TDO
—
— JTAG Test Data Output
O
VDDE2
MH
TDO (Pull Up8)M3
M3
TMS
—
— JTAG Test Mode Select Input
I
VDDE2
MH
TMS (Pull Up)
L3
TCK
—
— JTAG Test Clock Input
I
VDDE2
SH
TCK (Pull Down)
P3
JCOMP JCOMP
—
— JTAG Compliancy
I
VDDE2
SH
JCOMP (Pull Down)
K3
TEST
—
— Test Mode Select
I
VDDE3
IH
TEST9
M13
RESET RESET
—
— External Reset
I/O
VDDE1
MH
RESET (Pull Up)
A11
1 The primary signal name is used as the pin label on the BGA map for identification purposes.
2 Each line in the Signal Name column corresponds to a separate signal function on the pin. For all device I/O pins, the primary,
alternate, or GPIO signal functions are designated in the PA field of the System Integration Unit (SIU) PCR registers except
where explicitly noted.
3 The GPIO number is the same as the corresponding pad configuration register (SIU_PCRn) number.
4 The PA bitfield in the SIU_PCRn register selects the signal function for the pin. A dash in the Description field of this table
indicates that this value for PC is reserved on this pin, and should not be used.
5 The pad type is indicated by one or more of the following abbreviations: A–analog, F—fast speed, H–high voltage, I—input-only,
M–medium speed, S–slow speed. For example, pad type SH designates a slow high-voltage pad.
6 The Status During Reset pin is sampled after the internal POR is negated. Prior to exiting POR, the signal has a high
impedance. The terminology used in this column is: O – output, I – input, Up – weak pull up enabled, Down – weak pulldown
enabled, Low – output driven low, High – output driven high. A dash on the left side of the slash denotes that both the input and
output buffers for the pin are off. A dash on the right side of the slash denotes that there is no weak pull up/down enabled on
the pin. The signal name to the left or right of the slash indicates the pin is enabled.
7 The Function After Reset of a GPI function is general purpose input. A dash on the left side of the slash denotes that both the
input and output buffers for the pin are off. A dash on the right side of the slash denotes that there is no weak pull up/down
enabled on the pin.
8 Pullup is enabled only when JCOMP is negated.
9 Tie to V
SS for normal operation.
Table 2. MPC5668x Signal Properties (continued)
Pin
Name1
Supported
Functions2
GPIO
(PCR)
Num3
PA4
Description
I/O
Type
Volt-
age
Pad
Type5
Status
Package Pin
Locations
During
Reset6
After
Reset7
208
BGA
256
BGA
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC5668x
products
in
208
and
256
MAPBGA
packages
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MPC5668GF0AVMJR 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5668x Microcontroller Data Sheet
MPC5668GKITJ 制造商:Freescale Semiconductor 功能描述:EVAL KIT FOR MPC5668
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