
MOTOROLA
Chapter 3. Central Processing Unit
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Chapter 3
Central Processing Unit
The RISC processor (RCPU) used in the MPC500 family of microcontrollers integrates
five independent execution units: an integer unit (IU), a load/store unit (LSU), a branch
processing unit (BPU), a floating-point unit (FPU) and an integer multiplier divider (IMD).
The RISC’s use of simple instructions with rapid execution times yields high efficiency and
throughput for PowerPC ISA-based systems.
Most integer instructions execute in one clock cycle. Instructions can complete out of order
for increased performance; however, the processor makes execution appear sequential.
This section provides an overview of the RCPU. For a detailed description of this processor,
refer to the RCPU Reference Manual. The following sections describe each block and
sub-block.