參數(shù)資料
型號： MPC5603BEVLQ
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, LQFP-144
文件頁數(shù)： 5/72頁
文件大?。?/td> 971K
代理商： MPC5603BEVLQ
Electrical characteristics
MPC5604B/C Microcontroller Data Sheet, Rev. 4
Freescale Semiconductor
13
NOTE
Stresses exceeding the recommended absolute maximum ratings may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this
specification are not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. During overload conditions (VIN >VDD or
VIN <VSS), the voltage on pins with respect to ground (VSS) must not exceed the
recommended values.
4.5
Recommended operating conditions
Table 7. Recommended operating conditions (3.3 V)
Symbol
Parameter
Conditions
Value
Unit
Min
Max
VSS
SR Digital ground on VSS_HV pins
—
0
V
VDD
1
1 100 nF capacitance needs to be provided between each V
DD/VSS pair
SR Voltage on VDD_HV pins with respect
to ground (VSS)
—
3.0
3.6
V
VSS_LV
2
2 330 nF capacitance needs to be provided between each V
DD_LV/VSS_LV supply pair.
SR Voltage on VSS_LV (low voltage digital
supply) pins with respect to ground
(VSS)
—
VSS0.1 VSS+0.1
V
VDD_BV
3
3 100 nF capacitance needs to be provided between V
DD_BV and the nearest VSS_LV (higher value may be needed
depending on external regulator characteristics).
SR Voltage on VDD_BV pin (regulator
supply) with respect to ground (VSS)
—
3.0
3.6
V
Relative to VDD
VDD0.1 VDD+0.1
VSS_ADC
SR Voltage on VSS_HV_ADC (ADC
reference) pin with respect to ground
(VSS)
—
VSS0.1 VSS+0.1
V
VDD_ADC
4
4 100 nF capacitance needs to be provided between V
DD_ADC/VSS_ADC pair.
SR Voltage on VDD_HV_ADC pin (ADC
reference) with respect to ground
(VSS)
—
3.05
3.6
V
Relative to VDD
VDD0.1 VDD+0.1
VIN
SR Voltage on any GPIO pin with respect
to ground (VSS)
—
VSS0.1
—
V
Relative to VDD
—
VDD+0.1
IINJPAD
SR Injected input current on any pin
during overload condition
—
5
mA
IINJSUM
SR Absolute sum of all injected input
currents during overload condition
—
50
TVDD
SR VDD slope to ensure correct power up
6
—
0.25
V/s
—
3
—
V/s
TA
SR Ambient temperature under bias
fCPU < 64 MHz
40
125
°C
TJ
SR Junction temperature under bias
—
40
150
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC5604BxMG
products
in
208
MAPBGA
packages
相關(guān)PDF資料
PDF描述
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