參數(shù)資料
型號(hào)： MPC5602DF1CLL3
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-100
文件頁(yè)數(shù)： 17/83頁(yè)
文件大?。?/td> 1473K
代理商： MPC5602DF1CLL3
MPC5602D Microcontroller Data Sheet, Rev. 4
Preliminary—Subject to Change Without Notice
Electrical characteristics
Freescale Semiconductor
24
4.5
Recommended operating conditions
Table 11. Recommended operating conditions (3.3 V)
Symbol
C
Parameter
Conditions
Value
Unit
Min
Max
VSS
SR — Digital ground on VSS_HV pins
—
0
V
VDD
1
1 100 nF capacitance needs to be provided between each V
DD/VSS pair.
SR — Voltage on VDD_HV pins with respect to ground
(VSS)
—3.0
3.6
V
VSS_LV
2
2 330 nF capacitance needs to be provided between each V
DD_LV/VSS_LV supply pair.
SR — Voltage on VSS_LV (low voltage digital supply)
pins with respect to ground (VSS)
—VSS 0.1 VSS +0.1
V
VDD_BV
3
3 470 nF capacitance needs to be provided between V
DD_BV and the nearest VSS_LV (higher value may be needed
depending on external regulator characteristics).
SR — Voltage on VDD_BV pin (regulator supply) with
respect to ground (VSS)
—3.0
3.6
V
Relative to VDD VDD 0.1 VDD +0.1
VSS_ADC SR — Voltage on VSS_HV_ADC (ADC reference) pin
with respect to ground (VSS)
—VSS 0.1 VSS +0.1
V
VDD_ADC
4
4 100 nF capacitance needs to be provided between V
DD_ADC/VSS_ADC pair.
SR — Voltage on VDD_HV_ADC pin (ADC reference)
with respect to ground (VSS)
—3.05
5 Full electrical specification cannot be guaranteed when voltage drops below 3.0 V. In particular, ADC electrical
characteristics and I/Os DC electrical specification may not be guaranteed. When voltage drops below VLVDHVL,
device is reset.
3.6
V
Relative to VDD VDD 0.1 VDD +0.1
VIN
SR — Voltage on any GPIO pin with respect to ground
(VSS)
—VSS 0.1
—
V
Relative to VDD
—VDD +0.1
IINJPAD
SR — Injected input current on any pin during overload
condition
—
55
mA
IINJSUM
SR — Absolute sum of all injected input currents during
overload condition
—
50
mA
TVDD
SR — VDD slope to ensure correct power up
6
6 Guaranteed by device validation
—
0.25
V/s
TA
SR — Ambient temperature under bias
fCPU 48 MHz
40
125
°C
TJ
SR — Junction temperature under bias
—
40
150
Table 12. Recommended operating conditions (5.0 V)
Symbol
C
Parameter
Conditions
Value
Unit
Min
Max
VSS
SR — Digital ground on VSS_HV pins
—
0
V
VDD
1
SR — Voltage on VDD_HV pins with respect to ground
(VSS)
—4.5
5.5
V
Voltage drop2
3.0
5.5
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