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參數(shù)資料
| 型號： | MPC5602CF1MLL4 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, LQFP-100 |
| 文件頁數(shù)： | 58/106頁 |
| 文件大?。?/td> | 1693K |
| 代理商： | MPC5602CF1MLL4 |
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Electrical characteristics
MPC5604B/C Microcontroller Data Sheet, Rev. 8
Freescale Semiconductor
55
4.9.2
Voltage monitor electrical characteristics
The device implements a Power-on Reset (POR) module to ensure correct power-up initialization, as well as four low voltage
detectors (LVDs) to monitor the VDD and the VDD_LV voltage while device is supplied:
POR monitors VDD during the power-up phase to ensure device is maintained in a safe reset state
LVDHV3 monitors VDD to ensure device reset below minimum functional supply
LVDHV5 monitors VDD when application uses device in the 5.0 V ± 10% range
LVDLVCOR monitors power domain No. 1
LVDLVBKP monitors power domain No. 0
NOTE
When enabled, power domain No. 2 is monitored through LVD_DIGBKP.
Figure 11. Low voltage monitor vs reset
4 External regulator and capacitance circuitry must be capable of providing I
DD_BV while maintaining supply VDD_BV
in operating range.
5 In-rush current is seen only for short time during power-up and on standby exit (max 20 s, depending on external
LV capacitances to be load)
6 The duration of the in-rush current depends on the capacitance placed on LV pins. BV decaps must be sized
accordingly. Refer to IMREG value for minimum amount of current to be provided in cc.
VDD
VLVDHVxH
RESET
VLVDHVxL
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