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參數(shù)資料
| 型號： | MPC555PB |
| 廠商： | Motorola, Inc. |
| 英文描述： | CABLE ASSEMBLY; ; NMO Antenna Mount to BNC Male, RG58C/U, 5 feet |
| 中文描述： | 本文件提供了對MPC555的微控制器的概述，包括1塊示意圖主要模塊化組件和部門，即待 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 171K |
| 代理商： | MPC555PB |
4
MPC555 Product Brief
MOTOROLA
Key Features
1.2.7
Two Time Processor Units (TPU3)
Each TPU3 module provides these features:
— A dedicated micro-engine operates independently of the RCPU
— 16 independent programmable channels and pins
— Each channel has an event register consisting of a 16-bit capture register, a 16-bit compare
register and a 16-bit comparator
— Nine pre-programmed timer functions are available
— Any channel can perform any time function
— Each timer function can be assigned to more than one channel
— Two timer count registers with programmable prescalers
— Each channel can be synchronized to one or both counters
— Selectable channel priority levels
— 5-V tolerant inputs/outputs
6-Kbyte dual port TPU RAM (DPTRAM) is shared by the two TPU3 modules for TPU microcode
1.2.8
18-Channel Modular I/O System (MIOS1)
Ten double action submodules (DASM)
Eight dedicated PWM sub-modules (PWMSM)
Two 16-bit modulus counter submodules (MCSM)
Two parallel port I/O submodules (PIOSM)
5-V tolerant inputs/outputs
1.2.9
Two Queued Analog-to-Digital Converter Modules
(QADC64)
Each QADC provides:
Up to 16 analog input channels, using internal multiplexing
Up to 41 total input channels, using internal and external multiplexing
10-bit A/D converter with internal sample/hold
Typical conversion time of 10 μs (100,000 samples per second)
Two conversion command queues of variable length
Automated queue modes initiated by:
— External edge trigger/level gate
— Software command
64 result registers
Output data that is right- or left-justified, signed or unsigned
5-V reference and range
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