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參數(shù)資料
| 型號(hào)： | MPC555LFMZP40 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 32BIT 40MHZ 272-BGA |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 系列： | MPC5xx |
| 核心處理器： | PowerPC |
| 芯體尺寸： | 32-位 |
| 速度： | 40MHz |
| 連通性： | CAN，EBI/EMI，SCI，SPI，UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 101 |
| 程序存儲(chǔ)器容量： | 448KB（448K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 26K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 32x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 272-PBGA |
| 包裝： | 托盤 |
| 配用： | MPC555CMEE-ND - KIT EVAL FOR MPC555 |
4
MPC555 Product Brief
Key Features
1.2.7
Two Time Processor Units (TPU3)
Each TPU3 module provides these features:
— A dedicated micro-engine operates independently of the RCPU
— 16 independent programmable channels and pins
— Each channel has an event register consisting of a 16-bit capture register, a 16-bit compare
register and a 16-bit comparator
— Nine pre-programmed timer functions are available
— Any channel can perform any time function
— Each timer function can be assigned to more than one channel
— Two timer count registers with programmable prescalers
— Each channel can be synchronized to one or both counters
— Selectable channel priority levels
— 5-V tolerant inputs/outputs
6-Kbyte dual port TPU RAM (DPTRAM) is shared by the two TPU3 modules for TPU microcode
1.2.8
18-Channel Modular I/O System (MIOS1)
Ten double action submodules (DASM)
Eight dedicated PWM sub-modules (PWMSM)
Two 16-bit modulus counter submodules (MCSM)
Two parallel port I/O submodules (PIOSM)
5-V tolerant inputs/outputs
1.2.9
Two Queued Analog-to-Digital Converter Modules
(QADC64)
Each QADC provides:
Up to 16 analog input channels, using internal multiplexing
Up to 41 total input channels, using internal and external multiplexing
10-bit A/D converter with internal sample/hold
Typical conversion time of 10 s (100,000 samples per second)
Two conversion command queues of variable length
Automated queue modes initiated by:
— External edge trigger/level gate
— Software command
64 result registers
Output data that is right- or left-justified, signed or unsigned
5-V reference and range
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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