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參數(shù)資料
| 型號(hào)： | MN88413 |
| 廠商： | PANASONIC CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Channel Decoder LSI for Digital Satellite Broadcast Reception |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 18 X 18 MM, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 49K |
| 代理商： | MN88413 |
1
Digital Broadcast Reception LSI
MN88413
Channel Decoder LSI for Digital Satellite Broadcast Reception
I
Overview
The MN88413 is a channel decoder LSI that integrates functions for digital satellite communications and broadcast
reception on a single chip.
The MN88413 supports both the Digital Video Broadcast (DVB) and the Digital Satellite System (DSS
) specifications.
It also supports a variable transport rate that can be set under program control using a fixed system clock frequency and
can implement a channel decoder with a minimal number of external components.
I
Features
Can be used in systems conforming to DVB, in US DIRECTV
systems, and in single carrier per channel (SCPC)
communication systems.
Integrates a 2-channel A/D converter, a variable rate QPSK demodulator, and forward error correction
(FEC) on a single chip.
Supports transfer rates from 1 Mbps to 90 Mbps.
On-chip I/Q baseband signal offset voltage circuit and on-chip reference voltage circuit for the A/D and D/A converters.
On-chip PLL circuit
BER monitor function
I
2
C bus master circuit for tuner control
Supports LNB control clock and DiSEqC 1.0/1.1 and can output DiSEqC messages.
General-purpose input and output ports
On-chip boundary scan test circuit conforming to IEEE 1149.1
I
Applications
Digital satellite broadcast receivers
Note: DSS
and DIRECTV
are registered trademarks of DIRECTV, Inc.
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| MN89302 | 制造商:PANASONIC 制造商全稱:Panasonic Semiconductor 功能描述:SVGA Display Controller |
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