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參數(shù)資料
| 型號： | MN5521Q |
| 廠商： | PANASONIC CORP |
| 元件分類： | 外設及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PQFP208 |
| 封裝： | 28 X 28 MM, PLASTIC, QFP-208 |
| 文件頁數(shù)： | 8/18頁 |
| 文件大?。?/td> | 152K |
| 代理商： | MN5521Q |
16
MN5521
For Information Equipment
Electrical Characteristics (continued)
Ta=0 to 70C , VSS=0V , fTEST=24MHz
When specifications for the separated power supplies
VDD1=3.00 to 3.60V , VDD2=3.00 to 3.60V , VDD3 to 5=3.00 to 3.60V , VDD6=4.75 to 5.25V
Parameter
Symbol
Conditions
min
typ
max
Unit
CMOS level I/O: VDD5 group pin
NIOCS16
"H" level input voltage
VIH2
VDD=VDD5
VDD × 0.7
VDD
V
"L" level input voltage
VIL2
VDD=VDD5
0VDD × 0.3
V
"L" level output voltage
VOL
VDD=VDD5
0.4
V
IO=4.0mA
VI=VDD*9 or VSS
Output leakage current
ILO
In high-impedance state
±10
A
VI=VDD *9 or VSS
VO=VDD or VSS
Peak output current
IO
Absolute maximum rating
–24
24
mA
(Peak)
(not guaranteed operating value)
TTL level I/O with Schmidt circuit: *8 VDD6 group pins
PD0 to PD7, NAFD, NSTB, NINIT, NSLIN
Input threshold voltage
Vt
VDD=5.0V
0.8
2.0
V
"H" level output voltage
VOH
VDD=VDD6
2.4
V
IO=–12.0mA
VI=VDD *9 or VSS
"L" level output voltage
VOL
VDD=VDD6
0.4
V
IO=12.0mA
VI=VDD *9 or VSS
Output leakage current
ILO
In high-impedance state
±10
A
VI=VDD *9 or VSS
VO=VDD or VSS
Peak output current
IO
Absolute maximum rating
–36
36
mA
(Peak)
(not guaranteed operating value)
Output pin voltage
VO
Absolute maximum rating
–0.3
5.5
V
(not guaranteed operating value)
Notes
*1: The VDD applied to the oscillator pin XI must use a different power supply from that for the IDDS being measured.
*2: This measurement uses the resume mode pattern.
Pins driven at "H" level
LA23, LA22, LA21, LA20, LA19, LA18, LA17, SA16, SA15, SA14, SA13, SA12, SA11, SA10, SA09, SA08, SA07, SA06,
SA05, SA04, SA03, SA02, SA01, SA00, NACK, NERR, NPDACK, NSBHE, NSYSIORC, NSYSIOWC, NSYSMEMR,
NSYSMEMW, NSUSPEND, PWRGOOD, XI, NRTCRES, NSTNBY
Pins driven at "L" level
AEN, BALE, BUSY, BVD1A, BVD1B, BVD2A, BVD2B, MHZ24, PE, RDYA, RDYB, RSTDRV, SIN1, SIN2, SLCT,
SYSCLK, TC, TEST1, TEST2, TEST3, WPA, WPB, NCD1A, NCD1B, NCD2A, NCD2B, NCTS1, NCTS2, NDCD1,
NDCD2, NDSR1, NDSR2, NRI1, NRI2, NSTOP, NSTOP2, NWAITA, NWAITB, NIOCS16, IDED7, SD7, SD6, SD5,
SD4, SD3, SD2, SD1, SD0, NAFD, NSLIN, NSTB
*3: This measurement uses the resume mode pattern.
Pins driven at "H" level
XI, NSTOP, NRTCRES
Pins driven at "L" level
NSTOP2, NSTNBY
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