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參數(shù)資料
| 型號(hào)： | MN103S65G |
| 廠商： | PANASONIC CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 K-byte SRAM |
| 中文描述： | 32-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 14 MM, LEAD FREE, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 86K |
| 代理商： | MN103S65G |
MN103S65G
Internal RAM
4 K-byte SRAM
Internal ROM
128 K-byte
Type
MN103S65G
Minimum Instruction
Execution Time
25 ns (at 4.3 V to 5.5 V, 10 MHz internal regulator used)
25 ns (at 3.0 V to 3.6 V, 10 MHz)
*at internal 4 times oscillation used)
Package
LQFP080-P-1414A
*Lead-free
MAF00010AEM
Interrupts
9 external interrupts
42 internal interrupts (watch dog timer, timer, serial I/F, PWM, A/D, system error)
Timer Counter
Eight 8-bit timers
Interval timer, Event counter, Cascading
Four 16-bit timers
Interval timer, Event counter, PWM output, Double buffer
Watch dog timer
Serial Interface
UART (full duplex) / synchronous interfaces selective: 3
I/O Pins
exclusive: 2, selective: 48
I/O
A/D Inputs
10-bits, 2 inputs: 2, 6 inputs: 1
Minimum conversion time 1.5us
selective: 10
Input
50
10
PWM
3-phase PWM output
16-bit counter, triangular waveform or jigsaw waveform dead time setup,
Double buffer
Electrical Characteristics
T.B.D.
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