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參數(shù)資料
| 型號： | MN102HF85K |
| 廠商： | PANASONIC CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 12 MHz, MICROCONTROLLER, PDIP64 |
| 封裝： | 0.750 INCH, LEAD FREE, PLASTIC, SDIP-64 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 335K |
| 代理商： | MN102HF85K |
MAE00014GEM
MN102H85 Series
Type
MN102H85K
MN102HF85K
Internal ROM type
Mask ROM
FLASH
ROM (byte)
256K
RAM (byte)
8K
Package (Lead-free)
SDIP064-P-0750C
Minimum Instruction
Execution Time
83 ns (at 3.0 V to 3.6 V, 12 MHz)
Interrupts
External (6 lines)
Internal (30 lines) : Timer × 11, A/D × 1, Undened command × 1, RESET × 1, OSD × 2, Serial × 4, I2C × 1, Caption × 4, Remote control
×
1, Address coincidence × 4
Timer Counter
8-bit timer × 4
16-bit timer × 2
Watchdog timer : 17-bit × 1
Serial interface
I2C × 1 : for multimaster mode, bus line (output) has 2 systems
Sync serial / I2C (master) / UART × 2
Caption / Teletext Decoder
Built-in sync separator × 2
I/O Pins
I/O
50 : Common use
A/D converter
8-bit × 12-ch. (with S/H)
D/A converter
4-bit × 4-ch. (analog R, G, B, YM output)
PWM
8-bit × 7-ch.
Special Ports
Remote control reception
CRTC
3-layer display (graphics, characters, splits)
Notes
Remote control input discriminant circuit built-in
Electrical Charactreistics (D/A converter characteristics)
Parameter
Symbol
Condition
Limit
Unit
min
typ
max
D/A full-scale output current
IFS
RL = 200 , VREF = 1.2 V, RIREF = 1.2 k
4.5
5.0
5.5
mA
D/A output voltage setting range
VO
0.9
1.1
V
D/A non-linear error
NLE
±
0.5
LSB
D/A differential non-linear error DNLE
±
0.5
LSB
D/A channel interval error
IFS
VREF = 1.2 V, RIREF = 1.2 k, Error from 4-channel
average IFS
±
5
%
(Ta = 25°C , VDD = AVDD = 3.3 V , VSS = 0 V , fosc = 4 MHz)
Development tools
In-circuit Emulator
PX-ICE102H85-SDIP064-P-0750
Ma
int
en
an
ce
/
Dis
co
nti
nu
ed
Maintenance/Discontinued
includes
following
four
Product
lifecy
cle
stage.
planed
maintenance
type
maintenance
type
planed
discontinued
typed
discontinued
type
Please
visit
following
URL
about
latest
information.
http://panasonic.net/sc/en
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