參數(shù)資料
型號: MM74HCT05SJX
廠商: Fairchild Semiconductor
文件頁數(shù): 4/9頁
文件大?。?/td> 0K
描述: IC HEX INVERTER OPEN DRN 14-SOP
標準包裝: 2,000
系列: 74HCT
邏輯類型: 逆變器,緩沖器
電路數(shù): 6
輸入數(shù): 1
特點: 開路漏極
電源電壓: 4.5 V ~ 5.5 V
電流 - 靜態(tài)(最大值): 2µA
輸出電流高,低: -,4.8mA
邏輯電平 - 低: 0.8V
邏輯電平 - 高: 2V
額定電壓和最大 CL 時的最大傳播延遲: 15ns @ 5V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應商設備封裝: 14-SOIC
封裝/外殼: 14-SOIC(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
1984 Fairchild Semiconductor Corporation
www.fairchildsemi.com
MM74HCT05 Rev. 1.5.0
4
MM74HCT05
He
x
In
ver
ter
(Open
Drain)
DC Electrical Characteristics
(VCC = 5V ± 10% unless otherwise specified)
Note:
3. This is measured per input with all other inputs held at VCC or ground.
AC Electrical Characteristics
VCC = 5V, TA = 25°C,CL = 15pF, tr = tf = 6ns unless otherwise noted.
AC Electrical Characteristics
VCC = 5V, ± 10%, CL = 50pF, tr = tf = 6ns unless otherwise specified.
Note:
4. CPD determines the no load dynamic power consumption, PD = CPD VCC
2 f+I
CC VCC, and the no load dynamic current
consumption, IS = CPD VCC f + ICC.
Symbol
Parameter
Conditions
TA = 25°C
TA = –40°C
to 85°C
Units
Typ.
Guaranteed Limits
VIH
Minimum HIGH Level Input
Voltage
2.0
V
VIL
Maximum LOW Level Input
Voltage
0.8
V
VOL
Maximum LOW
Level Voltage
VIN = VIH, |IOUT| = 20A
0
0.1
V
VIN = VIH, |IOUT| = 4.0mA,
VCC = 4.5V
0.2
0.26
0.33
VIN = VIH, |IOUT| = 4.8mA,
VCC = 5.5V
0.2
0.26
0.33
IIN
Maximum Input Current
VIN = VCC or GND,
VIH or VIL
± 0.1
± 1.0
A
ILKG
Maximum HIGH Level Output
Leakage Current
VIN = VIH or VIL,
VOUT = VCC
0.5
5.0
A
ICC
Maximum Quiescent Supply
Current
VIN = VCC or GND,
IOUT = 0A
2.0
20
A
VIN = 2.4V or 0.5V
(3)
0.3
0.4
mA
IOHZ
Off State Current
VCC = 4.5V–5.5V, VO = 5.5V
10
A
Symbol
Parameter
Conditions
Typ.
Guaranteed
Limit
Units
tPZL
Maximum Propagation Delay
RL = 1k
815
ns
tPLZ
Maximum Propagation Delay
RL = 1k
916
ns
Symbol
Parameter
Conditions
TA=25°C
TA = –40°C
to 85°C
Units
Typ.
Guaranteed Limits
tPZL
Maximum Propagation Delay
RL = 1k
10
22
28
ns
tPLZ
Maximum Propagation Delay
RL = 1k
12
20
25
ns
tTHL
Maximum Output Fall Time
10
15
19
ns
CPD
Power Dissipation Capacitance
(per gate), RL = ∞,
(4)
20
pF
CIN
Maximum Input Capacitance
5
10
pF
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