參數(shù)資料
型號(hào): MM74HC594NX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 計(jì)數(shù)移位寄存器
英文描述: SERIAL IN PARALLEL OUT SHIFT REGISTER, PDIP16
封裝: 0.300 INCH, PLASTIC, MS-001, DIP-16
文件頁(yè)數(shù): 4/7頁(yè)
文件大?。?/td> 58K
代理商: MM74HC594NX
www.fairchildsemi.com
4
MM
74HC594
AC Electrical Characteristics
VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
VCC
TA = 25°C
40°C to +85°C
Units
Typ
Guaranteed Limits
fMAX
Maximum Operating
CL = 50 pF
2.0V
6
4.8
MHz
Frequency
4.5V
30
24
6.0V
35
28
tPHL, tPLH
Maximum Propagation Delay
CL = 50 pF
2.0V
150
185
ns
from SCK to Q’H
4.5V
30
37
6.0V
25
31
tPHL, tPLH
Maximum Propagation Delay
CL = 50 pF
2.0V
150
185
ns
from RCK to QA thru QH
CL = 150 pF
2.0V
200
250
CL = 50 pF
4.5V
30
37
ns
CL = 150 pF
4.5V
40
50
CL = 50 pF
6.0V
25
31
ns
CL = 150 pF
6.0V
34
43
tPHL, tPLH
Maximum Propagation Delay
2.0V
150
185
ns
from SCLR to Q’H
4.5V
30
37
6.0V
25
31
tPHL
Maximum Propagation Delay
CL = 50 pF
2.0V
125
155
ns
from RCLR to QA thru QH
4.5V
25
31
6.0V
21
26
CL = 150 pF
2.0V
200
250
ns
4.5V
40
50
6.0V
34
43
tS
SCLR LOW to RCK
2.0V
50
63
ns
4.5V
10
13
6.0V
9
11
tS
RCLR HIGH to SCK
2.0V
5
ns
4.5V
5
6.0V
5
tS
Minimum Setup Time
2.0V
90
110
ns
from SER to SCK
4.5V
18
22
6.0V
15
19
tR
Minimum Removal Time
2.0V
20
ns
from SCLR to SCK
4.5V
10
6.0V
10
tS
Minimum Setup Time
2.0V
90
110
ns
from SCK to RCK
4.5V
18
22
6.0V
15
19
tH
Minimum Hold Time
2.0V
5
ns
SER to SCK
4.5V
5
6.0V
5
tW
Minimum Pulse Width
2.0V
100
125
ns
of SCK or SCLR or
4.5V
20
25
RCK or RCLR
6.0V
17
21
tr, tf
Maximum Input Rise and
2.0V
1000
ns
Fall Time, Clock
4.5V
500
6.0V
400
tTHL, tTLH
Maximum Output
2.0V
60
75
ns
Rise and Fall Time
4.5V
12
15
QA - QH
6.0V
10
13
tTHL, tTLH
Maximum Output
2.0V
75
95
ns
Rise and Fall Time
4.5V
15
19
Q’H
6.0V
13
16
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