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參數(shù)資料
| 型號(hào)： | MM74HC573WM |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 通用總線(xiàn)功能 |
| 英文描述： | 1.5A, 520kHz Low Voltage with Synchronization Capability; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 0.300 INCH, MS-013, SOIC-20 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 88K |
| 代理商： | MM74HC573WM |
2000 Fairchild Semiconductor Corporation
DS005212
www.fairchildsemi.com
September 1983
Revised May 2000
M
MM74HC573
3-STATE Octal D-Type Latch
General Description
The MM74HC573 high speed octal D-type latches utilize
advanced silicon-gate P-well CMOS technology. They pos-
sess the high noise immunity and low power consumption
of standard CMOS integrated circuits, as well as the ability
to drive 15 LS-TTL loads. Due to the large output drive
capability and the 3-STATE feature, these devices are ide-
ally suited for interfacing with bus lines in a bus organized
system.
When the LATCH ENABLE(LE) input is HIGH, the Q out-
puts will follow the D inputs. When the LATCH ENABLE
goes LOW, data at the D inputs will be retained at the out-
puts until LATCH ENABLE returns HIGH again. When a
HIGH logic level is applied to the OUTPUT CONTROL OC
input, all outputs go to a HIGH impedance state, regardless
of what signals are present at the other inputs and the state
of the storage elements.
The 74HC logic family is speed, function and pinout com-
patible with the standard 74LS logic family. All inputs are
protected from damage due to static discharge by internal
diode clamps to V
CC
and ground.
Features
I
Typical propagation delay: 18 ns
I
Wide operating voltage range: 2 to 6 volts
I
Low input current: 1
μ
A maximum
I
Low quiescent current: 80
μ
A maximum (74HC Series)
I
Compatible with bus-oriented systems
I
Output drive capability: 15 LS-TTL loads
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Top View
Truth Table
H
=
HIGH Level
L
=
LOW Level
Q
0
=
Level of output before steady-state input conditions were established.
Z
=
High Impedance
X
=
Don't Care
Order Number
MM74HC573WM
MM74HC573SJ
MM74HC573MTC
MM74HC573N
Package Number
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Output
Latch
Data
Output
Control
Enable
L
H
H
H
L
H
L
L
L
L
X
Q
0
Z
H
X
X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MM74HC573 | 1.5 A, 520 kHz Low Voltage Buck Regulators with Synchronization Capability; Package: DFN18 6x5, 0.5p; No of Pins: 18; Container: Tape and Reel; Qty per Container: 2500 |
| MM74HC573MTC | 3-STATE Octal D-Type Latch |
| MM74HC574MTC | 3-STATE Octal D-Type Edge-Triggered Flip-Flop |
| MM74HC574N | 3-STATE Octal D-Type Edge-Triggered Flip-Flop |
| MM74HC574SJ | 3-STATE Octal D-Type Edge-Triggered Flip-Flop |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM74HC573WM | 制造商:Fairchild Semiconductor Corporation 功能描述:IC 74HC CMOS SMD 74HC573 SOIC20 |
| MM74HC573WMX | 功能描述:閉鎖 3-STATE Oct D Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類(lèi)型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線(xiàn)路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| MM74HC573WMX_NL | 制造商:Fairchild Semiconductor Corporation 功能描述:3-STATE OCTAL D-TYPE LATCH |
| MM74HC573WMX-CUT TAPE | 制造商:FAIRCHILD 功能描述:MM74HC Series High Speed CMOS 3-STATE Octal D-Type Latch - SOIC-20 |
| MM74HC574 | 制造商:FAIRCHILD 制造商全稱(chēng):Fairchild Semiconductor 功能描述:3-STATE Octal D-Type Edge-Triggered Flip-Flop |
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