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參數(shù)資料
| 型號(hào)： | MM74HC4511J |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | BCD-to-7 Segment Latch/Decoder/Driver |
| 中文描述： | HC/UH SERIES, SEVEN SEGMENT DECODER/DRIVER, TRUE OUTPUT, CDIP16 |
| 封裝： | DIP-16 |
| 文件頁(yè)數(shù)： | 4/6頁(yè) |
| 文件大?。?/td> | 140K |
| 代理商： | MM74HC4511J |
INPUTS
A, B, C, D (Pins 7, 1, 2, 6)
DBCD data inputs. A (pin 7) is the
least-significant data bit and D (pin 6) is the most significant
bit. Hexadecimal data A–F at these inputs will cause the
outputs to assume a logic low, offering an alternate method
of blanking the display.
OUTPUTS
a–g
DDecoded, buffered outputs. These outputs, unlike the
4511, have CMOS drivers, which will produce typical CMOS
output voltage levels.
CONTROLS
BI (Pin 4)
DActive-low display blanking input. A logic low on
this input will cause all outputs to be held at a logic low,
thereby blanking the display. LT is the only input that will
override the Bl input.
LT (Pin 3)
DActive-low lamp test. A low logic level on this
input causes all outputs to assume a logic high. This input
allows the user to test all segments of a display, with a
single control input. This input is independent of all other
inputs.
LE (Pin 5)
DLatch enable input. This input controls the 4-bit
transparent latch. A logic high on this input latches the data
present at the A, B, C and D inputs; a logic low allows the
data to be transmitted through the latch to the decoder.
Output Characteristics
(V
CC
e
5V)
TL/F/5373–2
*
The expected minimum curves are not guarantees, but are design aids.
TL/F/5373–3
Typical Applications
TL/F/5373–4
Typical Common Cathode LED Connection
TL/F/5373–5
Incandescent Bulb Driving Circuit
4
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相關(guān)代理商/技術(shù)參數(shù) |
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| MM74HC4511N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:BCD-to-7 Segment Latch/Decoder/Driver |
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