參數(shù)資料
型號: MM74HC164N
廠商: Fairchild Semiconductor
文件頁數(shù): 5/9頁
文件大?。?/td> 0K
描述: IC REGISTER PAR-OUT 8BIT 14-DIP
標準包裝: 25
系列: 74HC
邏輯類型: 移位寄存器
輸出類型: 標準
元件數(shù): 1
每個元件的位元數(shù): 8
功能: 串行至并行
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 14-DIP(0.300",7.62mm)
供應商設(shè)備封裝: 14-DIP
包裝: 管件
其它名稱: 74HC164
1983 Fairchild Semiconductor Corporation
www.fairchildsemi.com
MM74HC164 Rev. 1.5.0
5
MM74HC164
8-Bit
Serial-in/P
arallel-out
Shift
Register
AC Electrical Characteristics
CL = 50pF, tr = tf = 6ns (unless otherwise specified)
Note:
4. CPD determines the no load dynamic power consumption, PD = CPD VCC
2 f + I
CC VCC, and the no load dynamic
current consumption, IS = CPD VCC f + ICC.
Symbol
Parameter
VCC (V)
Conditions
TA = 25°C
TA = –40°C
to 85°C
TA = –55°C
to 125°C
Units
Typ.
Guaranteed Limits
fMAX
Maximum Operating
Frequency
2.0
5
4
3
MHz
4.5
27
21
18
6.0
31
24
20
tPHL, tPLH Maximum Propagation
Delay, Clock to Output
2.0
115
175
218
254
ns
4.5
13
35
44
51
6.0
20
30
38
44
tPHL
Maximum Propagation
Delay, Clear to Output
2.0
140
205
256
297
ns
4.5
28
41
51
59
6.0
24
35
44
51
tREM
Minimum Removal
Time, Clear to Clock
2.0
–7
0
ns
4.5
–3
0
6.0
–2
0
tS
Minimum Setup Time,
Data to Clock
2.0
25
100
125
150
ns
4.5
14
20
25
30
6.0
12
17
21
25
tH
Minimum Hold Time,
Clock to Data
2.0
–2
5
ns
4.5
0
5
6.0
1
5
tW
Minimum Pulse Width
Clear or Clock
2.0
22
80
100
120
ns
4.5
11
16
20
24
6.0
10
14
18
20
tTHL, tTLH Maximum Output
Rise and Fall Time
2.0
75
95
110
ns
4.5
15
19
22
6.0
13
16
19
tr, tf
Maximum Input
Rise and Fall Time
2.0
1000
ns
4.5
500
6.0
400
CPD
Power Dissipation
Capacitance(4)
5.0
(per package)
150
pF
CIN
Maximum Input
Capacitance
510
10
pF
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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